[coreboot-gerrit] New patch to review for coreboot: mb/gigabyte/gat945gcm-s2l: Add romstage time stamps

[Paul Menzel (paulepanter@users.sourceforge.net)]

Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17993

-gerrit

commit ab9a258408f292b9368ce03c9668e6cf119a75ec
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date:   Thu Dec 29 22:54:02 2016 +0100

    mb/gigabyte/gat945gcm-s2l: Add romstage time stamps
    
    Currently the time stamps *1:start of rom stage*, *2:before ram
    initialization*, and *3:after ram initialization*, so add them.
    
    Change-Id: Ie25747d02fadd74b7d7b7cab234a7a88b2cc0c42
    Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
 src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
index d84eae1..62729a7 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
@@ -25,6 +25,7 @@
 #include <lib.h>
 #include <arch/acpi.h>
 #include <cbmem.h>
+#include <timestamp.h>
 #include <superio/ite/it8718f/it8718f.h>
 #include <superio/ite/common/ite.h>
 #include <pc80/mc146818rtc.h>
@@ -165,6 +166,10 @@ void mainboard_romstage_entry(unsigned long bist)
 {
 	int s3resume = 0, boot_mode = 0;
 
+
+	timestamp_init(get_initial_timestamp());
+	timestamp_add_now(TS_START_ROMSTAGE);
+
 	if (bist == 0)
 		enable_lapic();
 
@@ -200,7 +205,10 @@ void mainboard_romstage_entry(unsigned long bist)
 #if CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8
 	dump_spd_registers();
 #endif
+
+	timestamp_add_now(TS_BEFORE_INITRAM);
 	sdram_initialize(s3resume ? 2 : boot_mode, NULL);
+	timestamp_add_now(TS_AFTER_INITRAM);
 
 	/* Perform some initialization that must run before stage2 */
 	early_ich7_init();