[coreboot-gerrit] New patch to review for coreboot: soc/glk: LPC gpio initialization

Hannah Williams (hannah.williams@intel.com) gerrit at coreboot.org
Tue Dec 13 05:06:12 CET 2016


Hannah Williams (hannah.williams at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17819

-gerrit

commit 074bcb7d88ad0d62af44f6de9c2c100a3d971770
Author: Hannah Williams <hannah.williams at intel.com>
Date:   Mon Oct 17 11:10:07 2016 -0700

    soc/glk: LPC gpio initialization
    
    Change-Id: I2181841da3d2661b5c0d5cce0136fa88baead4d8
    Signed-off-by: Hannah Williams <hannah.williams at intel.com>
---
 src/soc/intel/glk/lpc_lib.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/src/soc/intel/glk/lpc_lib.c b/src/soc/intel/glk/lpc_lib.c
index 5bda51d..53e6966 100644
--- a/src/soc/intel/glk/lpc_lib.c
+++ b/src/soc/intel/glk/lpc_lib.c
@@ -46,6 +46,22 @@ static const struct lpc_mmio_range {
 };
 
 static const struct pad_config lpc_gpios[] = {
+	GLK_GPIO_PAD_CONF("LPC_CLKOUT0", GPIO_148, NA, NA, NA, NA, NA, NA, P_NONE,
+	NO_INVERT, NA, HIZRX1I, DISPUPD,  NA, GPIO_NORTH), /*Function 1:LPC_CLKOUT - EC*/
+	GLK_GPIO_PAD_CONF("LPC_CLKOUT1", GPIO_149, NA, NA, NA, NA, NA, NA, P_NONE,
+	NO_INVERT, NA, HIZRX1I, DISPUPD,  NA, GPIO_NORTH), /*Function 1:LPC_CLKOUT - dTPM*/
+	GLK_GPIO_PAD_CONF("LPC_AD0", GPIO_150, NA, NA, NA, NA, NA, NA, P_20K_H,
+	NO_INVERT, NA, HIZRX1I, DISPUPD, NA, GPIO_NORTH), /*Function 1:LPC_AD0*/
+	GLK_GPIO_PAD_CONF("LPC_AD1", GPIO_151, NA, NA, NA, NA, NA, NA, P_20K_H,
+	NO_INVERT, NA, HIZRX1I, DISPUPD,  NA, GPIO_NORTH), /*Function 1:LPC_AD1*/
+	GLK_GPIO_PAD_CONF("LPC_AD2", GPIO_152, NA, NA, NA, NA, NA, NA, P_20K_H,
+	NO_INVERT, NA, HIZRX1I, DISPUPD,  NA, GPIO_NORTH), /*Function 1:LPC_AD2*/
+	GLK_GPIO_PAD_CONF("LPC_AD3", GPIO_153, NA, NA, NA, NA, NA, NA, P_20K_H,
+	NO_INVERT, NA, HIZRX1I, DISPUPD,  NA, GPIO_NORTH), /*Function 1:LPC_AD3*/
+	GLK_GPIO_PAD_CONF("LPC_CLKRUNB", GPIO_154, NA, NA, NA, NA, NA, NA, P_20K_H,
+	NO_INVERT, NA, HIZRX1I, DISPUPD,  NA, GPIO_NORTH), /*Function 1: LPC_CLKRUNB*/
+	GLK_GPIO_PAD_CONF("LPC_FRAMEB", GPIO_155, NA, NA, NA, NA, NA, NA, P_20K_H,
+	NO_INVERT, NA, HIZRX1I, DISPUPD,  NA, GPIO_NORTH), /*Function 1:LPC_FRAMEB*/
 };
 
 void lpc_configure_pads(void)



More information about the coreboot-gerrit mailing list