[coreboot-gerrit] Patch merged into coreboot/master: drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
gerrit at coreboot.org
gerrit at coreboot.org
Wed Aug 3 06:13:57 CEST 2016
the following patch was just integrated into master:
commit 0a38b227c802abbc0dbe966860d6e3521d5475ba
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun Jul 24 08:26:06 2016 -0700
drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
Display the MTRR values in the following locations:
* Before the call to FspMemoryInit to document coreboot settings
* After the call to FspMemoryInit
* Before the call to FspSiliconInit
* After the call to FspSiliconInit
* After the call to FspNotify
* Before the call to FspNotify added in patch 15855
TEST=Build and run on Galileo Gen2
Change-Id: I8942ef4ca4677501a5c38abaff1c3489eebea53c
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
Reviewed-on: https://review.coreboot.org/15849
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/15849 for details.
-gerrit
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