[coreboot-gerrit] New patch to review for coreboot: sb/amd/sb[6|7|8]00: Initialize PIC

Timothy Pearson (tpearson@raptorengineering.com) gerrit at coreboot.org
Mon Aug 1 23:06:04 CEST 2016


Timothy Pearson (tpearson at raptorengineering.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16018

-gerrit

commit 4ac53efabc2705724c54d7b83123073995174526
Author: Timothy Pearson <tpearson at raptorengineering.com>
Date:   Mon Aug 1 16:04:12 2016 -0500

    sb/amd/sb[6|7|8]00: Initialize PIC
    
    The PIC was not initialized, leading to hangs when booting
    Linux as a payload.  This error was hidden by both SeaBIOS
    and GRUB due to both payloads initializing the PIC as a
    matter of routine.
    
    Change-Id: I9a3b9bd831d4dafdd0bb82ea023026a10fe7efca
    Signed-off-by: Timothy Pearson <tpearson at raptorengineering.com>
---
 src/southbridge/amd/sb600/lpc.c | 5 +++++
 src/southbridge/amd/sb700/lpc.c | 5 +++++
 src/southbridge/amd/sb800/lpc.c | 5 +++++
 3 files changed, 15 insertions(+)

diff --git a/src/southbridge/amd/sb600/lpc.c b/src/southbridge/amd/sb600/lpc.c
index d459b1d..0541518 100644
--- a/src/southbridge/amd/sb600/lpc.c
+++ b/src/southbridge/amd/sb600/lpc.c
@@ -20,6 +20,8 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
+#include <pc80/i8254.h>
+#include <pc80/i8259.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <pc80/isa-dma.h>
@@ -60,6 +62,9 @@ static void lpc_init(device_t dev)
 	pci_write_config8(dev, 0x78, byte);
 
 	cmos_check_update_date();
+
+	setup_i8259(); /* Initialize i8259 pic */
+	setup_i8254(); /* Initialize i8254 timers */
 }
 
 static void sb600_lpc_read_resources(device_t dev)
diff --git a/src/southbridge/amd/sb700/lpc.c b/src/southbridge/amd/sb700/lpc.c
index 78933fa..f138d88 100644
--- a/src/southbridge/amd/sb700/lpc.c
+++ b/src/southbridge/amd/sb700/lpc.c
@@ -21,6 +21,8 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
+#include <pc80/i8254.h>
+#include <pc80/i8259.h>
 #include <arch/acpi.h>
 #include <arch/acpigen.h>
 #include <pc80/isa-dma.h>
@@ -75,6 +77,9 @@ static void lpc_init(device_t dev)
 	pci_write_config8(dev, 0x78, byte);
 
 	cmos_check_update_date();
+
+	setup_i8259(); /* Initialize i8259 pic */
+	setup_i8254(); /* Initialize i8254 timers */
 }
 
 #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
diff --git a/src/southbridge/amd/sb800/lpc.c b/src/southbridge/amd/sb800/lpc.c
index 3ba47a0..f15fed3 100644
--- a/src/southbridge/amd/sb800/lpc.c
+++ b/src/southbridge/amd/sb800/lpc.c
@@ -21,6 +21,8 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <pc80/mc146818rtc.h>
+#include <pc80/i8254.h>
+#include <pc80/i8259.h>
 #include <pc80/isa-dma.h>
 #include <arch/io.h>
 #include <arch/acpi.h>
@@ -66,6 +68,9 @@ static void lpc_init(device_t dev)
 	pci_write_config8(dev, 0xBB, byte);
 
 	cmos_check_update_date();
+
+	setup_i8259(); /* Initialize i8259 pic */
+	setup_i8254(); /* Initialize i8254 timers */
 }
 
 static void sb800_lpc_read_resources(device_t dev)



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