[coreboot-gerrit] New patch to review for coreboot: [WIP] arch/riscv: Set the stack pointer upon trap entry

[Jonathan Neuschäfer (j.neuschaefer@gmx.net)]

Jonathan Neuschäfer (j.neuschaefer at gmx.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16017

-gerrit

commit 801a6268d9517581ad33f02747d5cbd61d602ac0
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date:   Mon Aug 1 19:42:27 2016 +0200

    [WIP] arch/riscv: Set the stack pointer upon trap entry
    
    I probably shouldn't hard-code the start-of-stack.
    
    Change-Id: I52fae62bc6cf775179963720fbcfaa9e07f6a717
    Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
 src/arch/riscv/trap_util.S | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index 82a5629..9f04153 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -116,7 +116,14 @@ supervisor_trap_entry:
     .global  trap_entry
 trap_entry:
   csrw mscratch, sp
-  1:addi sp,sp,-320
+
+  # This will blow up horribly once we have multiple processors handling
+  # traps at the same time.
+  li sp, 0x8000fff0
+
+  # Somehow this faults.
+  ld zero, 0(sp)
+
   save_tf
   move  a0,sp
   jal trap_handler