[coreboot-gerrit] New patch to review for coreboot: AGESA vendorcode: Fix type mismatch
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Tue Apr 19 16:12:06 CEST 2016
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14416
-gerrit
commit 04759091fbcef3bf5d548641ca35b3e64eaf51ce
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Tue Apr 19 15:17:50 2016 +0300
AGESA vendorcode: Fix type mismatch
Fix is required to compile AGESA ramstage without raminit.
Change-Id: I783883fa7a12e8a647aa432535bb990a47257e9b
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h | 6 +++---
src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h | 2 +-
src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h | 10 +++++-----
src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h | 10 +++++-----
7 files changed, 29 insertions(+), 29 deletions(-)
diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h
index 3516fcb..23422a5 100644
--- a/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h
@@ -2563,7 +2563,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -2604,12 +2604,12 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
index cfb55cc..4fd5354 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
@@ -4033,7 +4033,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -4086,18 +4086,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
index d52adfb..7d6433d 100644
--- a/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
+++ b/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h
@@ -129,7 +129,7 @@
#if AGESA_ENTRY_INIT_LATE == TRUE
#define USER_PSTATE_OPTION_MAIN CreatePStateAcpiTables
#else
- OPTION_ACPI_FEATURE CreateAcpiTablesStub;
+// OPTION_ACPI_FEATURE CreateAcpiTablesStub;
#define USER_PSTATE_OPTION_MAIN CreateAcpiTablesStub
#endif
#if AGESA_ENTRY_INIT_POST == TRUE
diff --git a/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h
index 97b2d41..f97caa9 100644
--- a/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h
@@ -3865,7 +3865,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -3918,18 +3918,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h
index 24c1ae8..a4d8346 100644
--- a/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h
@@ -3629,7 +3629,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -3674,18 +3674,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h
index 873ed8b..e1c47ee 100644
--- a/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h
@@ -4687,7 +4687,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -4744,18 +4744,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
diff --git a/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h
index 1aaa027..647c370 100644
--- a/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h
+++ b/src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h
@@ -1556,7 +1556,7 @@ BOOLEAN MemFS3DefConstructorRet (
*---------------------------------------------------------------------------------------------------
*/
MEM_FEAT_BLOCK_MAIN MemFeatMain = {
- NULL
+ 0
};
/*---------------------------------------------------------------------------------------------------
@@ -1581,18 +1581,18 @@ BOOLEAN MemFS3DefConstructorRet (
*/
#if OPTION_DDR2
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR2 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
- NULL
+ 0
};
#endif
#if OPTION_DDR3
MEM_TECH_FEAT_BLOCK memTechTrainingFeatDDR3 = {
- NULL
+ 0
};
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
- NULL
+ 0
};
#endif
/*---------------------------------------------------------------------------------------------------
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