[coreboot-gerrit] New patch to review for coreboot: nb/amd/mct_ddr3: Add MCE reporting logic

[Timothy Pearson (tpearson@raptorengineeringinc.com)]

Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14265

-gerrit

commit 4194bd0ceb4407b64105175a1e394e0c8780a392
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Wed Apr 6 13:25:09 2016 -0500

    nb/amd/mct_ddr3: Add MCE reporting logic
    
    When a fatal error and subsequent sync flood / reset occurs,
    the MCA status registers may contain valuable information on
    the cause of the fatal error.  Add functions to report MCEs and
    reset the MCA status registers early in the boot process.
    
    Change-Id: Icde1051ac22f93688de1330f5e2c9ce28b14b59a
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
 src/northbridge/amd/amdmct/mct_ddr3/mct_d.c    | 37 ++++++++++++++++++++++++++
 src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c |  2 +-
 2 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 0b88331..64a7a38 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -2939,6 +2939,43 @@ fatalexit:
 	die("mct_d: fatalexit");
 }
 
+static void initialize_bsp_mca(uint8_t suppress_errors) {
+	uint32_t mc4_status_high;
+	uint32_t mc4_status_low;
+
+	mc4_status_high = pci_read_config32(PCI_DEV(0, 0x18, 3), 0x4c);
+	mc4_status_low = pci_read_config32(PCI_DEV(0, 0x18, 3), 0x48);
+	if ((mc4_status_high & (0x1 << 31)) && (mc4_status_high != 0xffffffff)) {
+		if (!suppress_errors)
+			printk(BIOS_WARNING, "WARNING: MC4 Machine Check Exception detected on BSP!\n"
+				"Signature: %08x%08x\n", mc4_status_high, mc4_status_low);
+
+		/* Clear MC4 error status */
+		pci_write_config32(PCI_DEV(0, 0x18, 3), 0x48, 0x0);
+		pci_write_config32(PCI_DEV(0, 0x18, 3), 0x4c, 0x0);
+	}
+}
+
+static void initialize_mca(uint8_t suppress_errors) {
+	uint8_t node;
+	uint32_t mc4_status_high;
+	uint32_t mc4_status_low;
+
+	for (node = 0; node < MAX_NODES_SUPPORTED; node++) {
+		mc4_status_high = pci_read_config32(PCI_DEV(0, 0x18 + node, 3), 0x4c);
+		mc4_status_low = pci_read_config32(PCI_DEV(0, 0x18 + node, 3), 0x48);
+		if ((mc4_status_high & (0x1 << 31)) && (mc4_status_high != 0xffffffff)) {
+			if (!suppress_errors)
+				printk(BIOS_WARNING, "WARNING: MC4 Machine Check Exception detected on node %d!\n"
+					"Signature: %08x%08x\n", node, mc4_status_high, mc4_status_low);
+
+			/* Clear MC4 error status */
+			pci_write_config32(PCI_DEV(0, 0x18 + node, 3), 0x48, 0x0);
+			pci_write_config32(PCI_DEV(0, 0x18 + node, 3), 0x4c, 0x0);
+		}
+	}
+}
+
 static u8 ReconfigureDIMMspare_D(struct MCTStatStruc *pMCTstat,
 					struct DCTStatStruc *pDCTstatA)
 {
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
index 1077cb8..65de0f8 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
@@ -256,7 +256,7 @@ u8 ECCInit_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA)
 			if ((val & 0x3) == 0x3) {	/* Node has dram populated */
 				uint32_t mc4_status_high = pci_read_config32(pDCTstat->dev_nbmisc, 0x4c);
 				uint32_t mc4_status_low = pci_read_config32(pDCTstat->dev_nbmisc, 0x48);
-				if (mc4_status_high != 0) {
+				if ((mc4_status_high & (0x1 << 31)) && (mc4_status_high != 0xffffffff)) {
 					printk(BIOS_WARNING, "WARNING: MC4 Machine Check Exception detected!\n"
 						"Signature: %08x%08x\n", mc4_status_high, mc4_status_low);
 				}