[coreboot-gerrit] Patch merged into coreboot/master: intel/kunimitsu: USB Phy settings and Skip UART2 init in FSP

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 9cd8e5aebf3829ac6d8ff34af67dde031abf51bc
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date:   Mon Oct 5 19:13:01 2015 +0530

    intel/kunimitsu: USB Phy settings and Skip UART2 init in FSP
    
    FSP 1.7.0 provides UPD to configure USB phy settings
    update the same for kunimitsu.
    
    FSP 1.7.0 also provides UPD to indicate FSP not to reinitialise
    UART2 controller during MemoryInit.
    
    BRANCH=none
    BUG=chrome-os-partner:45684,chrome-os-partner:41374,chrome-os-partner:42284
    TEST=build for Kunimitsu, boot on FAB3, Also checked for Boot from USB,
    	Boot from eMMC, USB Audio, Onboard Audio, Touch, Wifi, S3 entry/resume
    
    CQ-DEPEND=CL:303661
    
    Change-Id: Ie0a545c954f472cc822b63786d40399ec93d5166
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 90296e04942c70d972c225fc75dfab6de44d10ed
    Original-Change-Id: If79e81ef3323e782e96db307d89a01c14174b435
    Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Original-Signed-off-by: Rishavnath Satapathy <rishavnath.satapathy at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/304032
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/12145
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/12145 for details.

-gerrit