[coreboot-gerrit] New patch to review for coreboot: fsp/intel common: Add support for Gfx PEIM (AKA GOP)

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Fri Oct 23 13:25:46 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12141

-gerrit

commit cd1d73c039120ed5338e8422283d37c65c5d5a6e
Author: robbie zhang <robbie.zhang at intel.com>
Date:   Thu Oct 1 16:37:58 2015 -0700

    fsp/intel common: Add support for Gfx PEIM (AKA GOP)
    
    This patch provides the lb_framebuffer() for coreboot table with
    fsp gop usage, add Igd Opregion register defines, and update the
    UPD naming following fsp.
    
    BRANCH=none
    BUG=chrome-os-partner:44559
    TEST=Built and boot on kunimitsu/glados.
    
    Change-Id: I9cf9d991eb09d698e7a78323cd855c4c99b55eca
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: cd6834057cca60716bc0e24cfc2cd60fed02be7a
    Original-Change-Id: I64987e393c39a7cc1084edf59e7ca51b8c5ea743
    Original-Signed-off-by: robbie zhang <robbie.zhang at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/303539
    Original-Commit-Ready: Robbie Zhang <robbie.zhang at intel.com>
    Original-Tested-by: Robbie Zhang <robbie.zhang at intel.com>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/drivers/intel/fsp1_1/fsp_gop.c         | 3 ++-
 src/drivers/intel/fsp1_1/include/fsp/gop.h | 2 --
 src/soc/intel/common/gma.h                 | 6 ++++++
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/drivers/intel/fsp1_1/fsp_gop.c b/src/drivers/intel/fsp1_1/fsp_gop.c
index c5b515c..14a7650 100644
--- a/src/drivers/intel/fsp1_1/fsp_gop.c
+++ b/src/drivers/intel/fsp1_1/fsp_gop.c
@@ -17,6 +17,7 @@
  * Foundation, Inc.
  */
 
+#include <boot/coreboot_tables.h>
 #include <cbfs.h>
 #include <console/console.h>
 #include <fsp/util.h>
@@ -61,7 +62,7 @@ const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len)
 	return vbt.data;
 }
 
-void fsp_gop_framebuffer(struct lb_header *header)
+void lb_framebuffer(struct lb_header *header)
 {
 	struct lb_framebuffer *framebuffer;
 	framebuffer = (struct lb_framebuffer *)lb_new_record(header);
diff --git a/src/drivers/intel/fsp1_1/include/fsp/gop.h b/src/drivers/intel/fsp1_1/include/fsp/gop.h
index 14bada6..78d2878 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/gop.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/gop.h
@@ -23,11 +23,9 @@
 /* GOP support */
 #if IS_ENABLED(CONFIG_GOP_SUPPORT)
 
-#include <boot/coreboot_tables.h>
 #include <soc/intel/common/gma.h>
 
 const optionrom_vbt_t *fsp_get_vbt(uint32_t *vbt_len);
-void fsp_gop_framebuffer(struct lb_header *header);
 
 #endif /* CONFIG_GOP_SUPPORT */
 #endif /* _FSP_GOP_H_ */
diff --git a/src/soc/intel/common/gma.h b/src/soc/intel/common/gma.h
index 03ecedb..64b2a28 100644
--- a/src/soc/intel/common/gma.h
+++ b/src/soc/intel/common/gma.h
@@ -23,6 +23,12 @@
 
 #include <types.h>
 
+/* IGD PCI Configuration register */
+#define ASLS		0xfc		/* OpRegion Base */
+#define SWSCI		0xe8		/* SWSCI Register */
+#define GSSCIE		(1 << 0)	/* SCI Event trigger */
+#define SMISCISEL	(1 << 15)	/* Select SMI or SCI event source */
+
 /* mailbox 0: header */
 typedef struct {
 	u8	signature[16];



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