[coreboot-gerrit] New patch to review for coreboot: armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12083

-gerrit

commit d38f83d058e24424d4ca1d41c374a207bd646a2f
Author: Paul Kocialkowski <contact at paulk.fr>
Date:   Tue Sep 22 22:16:33 2015 +0200

    armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write
    
    As a follow up to Change-Id: I1fb3fc139e0a813acf9d70f14386a9603c9f9ede,
    use as builtin compiler hint instead of inline assembly to allow the
    compiler to generate more efficient code.
    
    Change-Id: I690514ac6d8988a6494ad3a77690709d932802b0
    Signed-off-by: Paul Kocialkowski <contact at paulk.fr>
    Signed-off-by: Patrick Georgi <pgeorgi at google.com>
---
 src/arch/arm/include/armv7/arch/io.h | 21 ++++++---------------
 1 file changed, 6 insertions(+), 15 deletions(-)

diff --git a/src/arch/arm/include/armv7/arch/io.h b/src/arch/arm/include/armv7/arch/io.h
index 94cb131..2901ac2 100644
--- a/src/arch/arm/include/armv7/arch/io.h
+++ b/src/arch/arm/include/armv7/arch/io.h
@@ -29,49 +29,40 @@
 
 static inline uint8_t read8(const void *addr)
 {
-	uint8_t val;
-
 	dmb();
-	asm volatile ("ldrb %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
-	return val;
+	return *(volatile uint8_t *)__builtin_assume_aligned(addr, sizeof(uint8_t));
 }
 
 static inline uint16_t read16(const void *addr)
 {
-	uint16_t val;
-
 	dmb();
-	asm volatile ("ldrh %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
-	return val;
+	return *(volatile uint16_t *)__builtin_assume_aligned(addr, sizeof(uint16_t));
 }
 
 static inline uint32_t read32(const void *addr)
 {
-	uint32_t val;
-
 	dmb();
-	asm volatile ("ldr %0, [%1]" : "=r" (val) : "r" (addr) : "memory");
-	return val;
+	return *(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t));
 }
 
 static inline void write8(void *addr, uint8_t val)
 {
 	dmb();
-	asm volatile ("strb %0, [%1]" : : "r" (val), "r" (addr) : "memory");
+	*(volatile uint8_t *)__builtin_assume_aligned(addr, sizeof(uint8_t)) = val;
 	dmb();
 }
 
 static inline void write16(void *addr, uint16_t val)
 {
 	dmb();
-	asm volatile ("strh %0, [%1]" : : "r" (val), "r" (addr) : "memory");
+	*(volatile uint16_t *)__builtin_assume_aligned(addr, sizeof(uint16_t)) = val;
 	dmb();
 }
 
 static inline void write32(void *addr, uint32_t val)
 {
 	dmb();
-	asm volatile ("str %0, [%1]" : : "r" (val), "r" (addr) : "memory");
+	*(volatile uint32_t *)__builtin_assume_aligned(addr, sizeof(uint32_t)) = val;
 	dmb();
 }