[coreboot-gerrit] Patch merged into coreboot/master: intel/southbridge/bd82x6x: Add option to set SPI VSCC registers

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 7b2f9f6994341a890a11220a9d9fcbf7997bcae9
Author: Nico Huber <nico.huber at secunet.com>
Date:   Thu Oct 1 19:00:51 2015 +0200

    intel/southbridge/bd82x6x: Add option to set SPI VSCC registers
    
    These are needed for the hardware-sequencing function of the PCH SPI
    interface. Values are specific to the flash chip used on a board.
    
    Change-Id: Id06766b4bac2686406bc09b8afa02f311f40dee7
    Signed-off-by: Nico Huber <nico.huber at secunet.com>
    Reviewed-on: http://review.coreboot.org/11798
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Nicolas Reinecke <nr at das-labor.org>
    Reviewed-by: Duncan Laurie <dlaurie at google.com>


See http://review.coreboot.org/11798 for details.

-gerrit