[coreboot-gerrit] Patch set updated for coreboot: auron: fix can not recognize 4G memory

Marc Jones (marc@marcjonesconsulting.com) gerrit at coreboot.org
Sat Oct 17 00:29:18 CEST 2015


Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11911

-gerrit

commit 639b1ff82cb81aa431459f04d147d34d75287a44
Author: Tim Chen <Tim-Chen at quantatw.com>
Date:   Tue Oct 14 20:17:11 2014 +0800

    auron: fix can not recognize 4G memory
    
    Part of the following patch was lost in the merge from chromium.
    This patch fixes up the spd_index for the copy from the SPD file.
    
    In spd.c "spd_index *= SPD_LEN" will change the original spd_index
    from gpio and let the following if(spd_index>3) to misjudge and
    disable channel 1 incorrectly. So we calculate the index for spd file
    memcpy when calling memcpy().
    
    BUG=chrome-os-partner:32879
    TEST=Can get total memory 4G on yuna 4G SKU
    BRANCH=Auron
    
    Original-Change-Id: Iebc49e20e4ca15ef6db8c4defe43cc22382a28bf
    Original-Signed-off-by: Tim Chen <Tim-Chen at quantatw.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/234420
    Original-Reviewed-by: Shawn N <shawnn at chromium.org>
    Original-Commit-Queue: Shawn N <shawnn at chromium.org>
    Original-Tested-by: Shawn N <shawnn at chromium.org>
    
    (cherry picked from commit 3b1fce58b7b4b15e947b40fd011174d4e8e294bc)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I03f9d63623e083c99d349d938fd802d828858f70
---
 src/mainboard/google/auron/spd/spd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/google/auron/spd/spd.c b/src/mainboard/google/auron/spd/spd.c
index 2f3f20c..4f35477 100644
--- a/src/mainboard/google/auron/spd/spd.c
+++ b/src/mainboard/google/auron/spd/spd.c
@@ -122,14 +122,14 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
 		die("Missing SPD data.");
 
 	memcpy(pei_data->spd_data[0][0],
-		spd_file + spd_index, SPD_LEN);
+		spd_file + (spd_index * SPD_LEN), SPD_LEN);
 	/* Index 0-2 are 4GB config with both CH0 and CH1.
 	 * Index 4-6 are 2GB config with CH0 only. */
 	if (spd_index > 3)
 		pei_data->dimm_channel1_disabled = 3;
 	else
 		memcpy(pei_data->spd_data[1][0],
-			spd_file + spd_index, SPD_LEN);
+			spd_file + (spd_index * SPD_LEN), SPD_LEN);
 
 	/* Make sure a valid SPD was found */
 	if (pei_data->spd_data[0][0][0] == 0)



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