[coreboot-gerrit] New patch to review for coreboot: AMD/hudson: Add tail size of each CBFS modules

[Zheng Bao (zheng.bao@amd.com)]

Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12352

-gerrit

commit 783ca4fea252eef98dfb08f2ceb96ec8b71fbabf
Author: zbao <fishbaozi at gmail.com>
Date:   Sat Nov 7 01:09:05 2015 +0800

    AMD/hudson: Add tail size of each CBFS modules
    
    When we calculate the offset of each module, we need to add the tail
    size of last one.
    
    Change-Id: I2ec01ffd36b2708b72968b7742849da83339c3a6
    Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
---
 src/southbridge/amd/pi/hudson/Makefile.inc | 23 ++++++++++++-----------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index 00d150f..37046be 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -67,6 +67,7 @@ HUDSON_FWM_POSITION=$(shell printf %u $(CONFIG_HUDSON_FWM_POSITION))
 HUDSON_FWM_INSIDE_CBFS=$(call int-lt, $(CBFS_BASE_ADDRESS) $(HUDSON_FWM_POSITION))
 
 CBFS_HEADER_SIZE=0x60
+CBFS_TAIL_SIZE=0x40
 
 #assume the cbfs header is less than $(CBFS_HEADER_SIZE) bytes.
 ROMSIG_SIZE=4096
@@ -205,7 +206,7 @@ endif
 #5
 CONFIG_PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key
 PUBSIGNEDKEY_POS=$(call int-align, \
-	$(call int-add,$(AMDPUBKEY_POS) $(AMDPUBKEY_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(AMDPUBKEY_POS) $(AMDPUBKEY_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 PUBSIGNEDKEY_SIZE=$(call file-size,$(CONFIG_PUBSIGNEDKEY_FILE))
 
@@ -216,7 +217,7 @@ else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
 CONFIG_PSPBTLDR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspBootLoader_prod_$(FIRMWARE_TYPE).sbin
 endif
 PSPBTLDR_POS=$(call int-align, \
-	$(call int-add,$(PUBSIGNEDKEY_POS) $(PUBSIGNEDKEY_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(PUBSIGNEDKEY_POS) $(PUBSIGNEDKEY_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 PSPBTLDR_SIZE=$(call file-size,$(CONFIG_PSPBTLDR_FILE))
 
@@ -227,7 +228,7 @@ else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
 CONFIG_PSPRCVR_FILE=$(top)/$(FIRMWARE_LOCATE)/PspRecoveryBootLoader_prod_$(FIRMWARE_TYPE).sbin
 endif
 PSPRCVR_POS=$(call int-align, \
-	$(call int-add,$(PSPBTLDR_POS) $(PSPBTLDR_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(PSPBTLDR_POS) $(PSPBTLDR_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 PSPRCVR_SIZE=$(call file-size,$(CONFIG_PSPRCVR_FILE))
 
@@ -238,35 +239,35 @@ else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
 CONFIG_PSPSCUREOS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureOs_prod_$(FIRMWARE_TYPE).csbin
 endif
 PSPSECUREOS_POS=$(call int-align, \
-	$(call int-add,$(PSPRCVR_POS) $(PSPRCVR_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(PSPRCVR_POS) $(PSPRCVR_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 PSPSECUREOS_SIZE=$(call file-size,$(CONFIG_PSPSCUREOS_FILE))
 
 #4
 CONFIG_PSPNVRAM_FILE=$(top)/$(FIRMWARE_LOCATE)/PspNvram$(FIRMWARE_TYPE).bin
 PSPNVRAM_POS=$(call int-align, \
-	$(call int-add,$(PSPSECUREOS_POS) $(PSPSECUREOS_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(PSPSECUREOS_POS) $(PSPSECUREOS_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 PSPNVRAM_SIZE=$(call file-size,$(CONFIG_PSPNVRAM_FILE))
 
 #8
 CONFIG_SMUFWM_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware$(FIRMWARE_TYPE).sbin
 SMUFWM_POS=$(call int-align, \
-	$(call int-add,$(PSPNVRAM_POS) $(PSPNVRAM_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(PSPNVRAM_POS) $(PSPNVRAM_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 SMUFWM_SIZE=$(call file-size,$(CONFIG_SMUFWM_FILE))
 
 #95
 CONFIG_SMUSCS_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuScs$(FIRMWARE_TYPE).bin
 SMUSCS_POS=$(call int-align, \
-	$(call int-add,$(SMUFWM_POS) $(SMUFWM_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(SMUFWM_POS) $(SMUFWM_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 SMUSCS_SIZE=$(call file-size,$(CONFIG_SMUSCS_FILE))
 
 #9
 CONFIG_PSPSECUREDEBUG_FILE=$(top)/$(FIRMWARE_LOCATE)/PspSecureDebug$(FIRMWARE_TYPE).Key
 PSPSECUREDEBUG_POS=$(call int-align, \
-	$(call int-add,$(SMUSCS_POS) $(SMUSCS_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(SMUSCS_POS) $(SMUSCS_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 PSPSECUREDEBUG_SIZE=$(call file-size,$(CONFIG_PSPSECUREDEBUG_FILE))
 
@@ -277,7 +278,7 @@ else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
 CONFIG_PSPTRUSTLETS_FILE=$(top)/$(FIRMWARE_LOCATE)/PspTrustlets_prod_$(FIRMWARE_TYPE).cbin
 endif
 PSPTRUSTLETS_POS=$(call int-align, \
-	$(call int-add,$(PSPSECUREDEBUG_POS) $(PSPSECUREDEBUG_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(PSPSECUREDEBUG_POS) $(PSPSECUREDEBUG_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 PSPTRUSTLETS_SIZE=$(call file-size,$(CONFIG_PSPTRUSTLETS_FILE))
 
@@ -288,7 +289,7 @@ else ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
 CONFIG_TRUSTLETKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/TrustletKey_prod_$(FIRMWARE_TYPE).sbin
 endif
 TRUSTLETKEY_POS=$(call int-align, \
-	$(call int-add,$(PSPTRUSTLETS_POS) $(PSPTRUSTLETS_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(PSPTRUSTLETS_POS) $(PSPTRUSTLETS_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 TRUSTLETKEY_SIZE=$(call file-size,$(CONFIG_TRUSTLETKEY_FILE))
 
@@ -296,7 +297,7 @@ TRUSTLETKEY_SIZE=$(call file-size,$(CONFIG_TRUSTLETKEY_FILE))
 ifeq ($(CONFIG_CPU_AMD_PI_00660F01), y)
 CONFIG_SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).sbin
 SMUFIRMWARE2_POS=$(call int-align, \
-	$(call int-add,$(TRUSTLETKEY_POS) $(TRUSTLETKEY_SIZE) $(CBFS_HEADER_SIZE)), \
+	$(call int-add,$(TRUSTLETKEY_POS) $(TRUSTLETKEY_SIZE) $(CBFS_HEADER_SIZE) $(CBFS_TAIL_SIZE)), \
 	$(CBFS_HEADER_SIZE))
 SMUFIRMWARE2_SIZE=$(call file-size,$(CONFIG_SMUFIRMWARE2_FILE))
 endif