[coreboot-gerrit] New patch to review for coreboot: ultra40m2: configure TPM ports
Jonathan A. Kollasch (jakllsch@kollasch.net)
gerrit at coreboot.org
Tue Nov 3 21:23:13 CET 2015
Jonathan A. Kollasch (jakllsch at kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12311
-gerrit
commit 5f1a31d7bfeee4964a79dc9f3525bc098d492164
Author: Jonathan A. Kollasch <jakllsch at kollasch.net>
Date: Tue Nov 3 12:26:05 2015 -0600
ultra40m2: configure TPM ports
Change-Id: Ie4a645da500f5417cd378079e3eb8a9253065f2d
Signed-off-by: Jonathan A. Kollasch <jakllsch at kollasch.net>
---
src/mainboard/sunw/ultra40m2/devicetree.cb | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/sunw/ultra40m2/devicetree.cb b/src/mainboard/sunw/ultra40m2/devicetree.cb
index d61dd17..bbcf3ee 100644
--- a/src/mainboard/sunw/ultra40m2/devicetree.cb
+++ b/src/mainboard/sunw/ultra40m2/devicetree.cb
@@ -41,8 +41,13 @@ chip northbridge/amd/amdk8/root_complex # Root complex
io 0x60 = 0x600
end
end
+ chip drivers/pc80/tpm
+ device pnp 4e.0 on # Infineon SLB9635TT12 TPM
+ #io 0x60 = 0x7f0
+ end
+ end
# There's also an Akom AK2001 7-segment port 0x80 decoder on
- # and Infineon SLB9635TT12 TPM on this LPC bus.
+ # this LPC bus.
end
device pci 1.1 on # SM 0
chip drivers/generic/generic # DIMM 0-0-0
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