[coreboot-gerrit] New patch to review for coreboot: fa0bb96 rk3288: Add GPIO() macro
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Thu Mar 26 14:58:26 CET 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9052
-gerrit
commit fa0bb9691bc658a8dce69a0f612e34af9416d91e
Author: Julius Werner <jwerner at chromium.org>
Date: Fri Sep 26 17:48:28 2014 -0700
rk3288: Add GPIO() macro
The static gpio_t initializers are stylish, but they are still a little
too annoying to write and read in day-to-day use. Let's wrap that in a
macro to make it a little easier to handle.
BUG=None
TEST=None
Change-Id: If41b2b3fd3c3f94797d314ba5f3ffcb2a250a005
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 102a5c0a800f43d688d11d1d7bbc51e360341517
Original-Change-Id: I385ae5182776c8cbb20bbf3c79b986628040f1cf
Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/220250
Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
---
src/mainboard/google/veyron_pinky/chromeos.c | 8 ++++----
src/mainboard/google/veyron_pinky/mainboard.c | 20 ++++++++++----------
src/mainboard/google/veyron_pinky/reset.c | 2 +-
src/mainboard/google/veyron_pinky/sdram_configs.c | 8 ++++----
src/soc/rockchip/rk3288/gpio.h | 2 ++
5 files changed, 21 insertions(+), 19 deletions(-)
diff --git a/src/mainboard/google/veyron_pinky/chromeos.c b/src/mainboard/google/veyron_pinky/chromeos.c
index 4e1e50c..50dc494 100644
--- a/src/mainboard/google/veyron_pinky/chromeos.c
+++ b/src/mainboard/google/veyron_pinky/chromeos.c
@@ -25,10 +25,10 @@
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/rockchip/rk3288/gpio.h>
-#define GPIO_WP (gpio_t){.port = 7, .bank = GPIO_A, .idx = 6}
-#define GPIO_LID (gpio_t){.port = 7, .bank = GPIO_B, .idx = 5}
-#define GPIO_POWER (gpio_t){.port = 0, .bank = GPIO_A, .idx = 5}
-#define GPIO_RECOVERY (gpio_t){.port = 0, .bank = GPIO_B, .idx = 1}
+#define GPIO_WP GPIO(7, A, 6)
+#define GPIO_LID GPIO(7, B, 5)
+#define GPIO_POWER GPIO(0, A, 5)
+#define GPIO_RECOVERY GPIO(0, B, 1)
void setup_chromeos_gpios(void)
{
diff --git a/src/mainboard/google/veyron_pinky/mainboard.c b/src/mainboard/google/veyron_pinky/mainboard.c
index d3537bf..4d647d3 100644
--- a/src/mainboard/google/veyron_pinky/mainboard.c
+++ b/src/mainboard/google/veyron_pinky/mainboard.c
@@ -39,16 +39,16 @@
static void setup_gpio(void)
{
/*SOC and TPM reset GPIO, active high.*/
- gpio_output((gpio_t){.port = 0, .bank = GPIO_B, .idx = 2}, 0);
+ gpio_output(GPIO(0, B, 2), 0);
/* Configure GPIO for lcd_bl_en */
- gpio_output((gpio_t){.port = 7, .bank = GPIO_A, .idx = 2}, 1);
+ gpio_output(GPIO(7, A, 2), 1);
/*Configure backlight PWM 100% brightness*/
- gpio_output((gpio_t){.port = 7, .bank = GPIO_A, .idx = 0}, 0);
+ gpio_output(GPIO(7, A, 0), 0);
/* Configure GPIO for lcd_en */
- gpio_output((gpio_t){.port = 7, .bank = GPIO_B, .idx = 7}, 1);
+ gpio_output(GPIO(7, B, 7), 1);
}
static void setup_iomux(void)
@@ -76,22 +76,22 @@ static void setup_iomux(void)
static void setup_usb_poweron(void)
{
/* Configure GPIO for usb1_pwr_en */
- gpio_output((gpio_t){.port = 0, .bank = GPIO_B, .idx = 3}, 1);
+ gpio_output(GPIO(0, B, 3), 1);
/* Configure GPIO for usb2_pwr_en */
- gpio_output((gpio_t){.port = 0, .bank = GPIO_B, .idx = 4}, 1);
+ gpio_output(GPIO(0, B, 4), 1);
/* Configure GPIO for 5v_drv */
- gpio_output((gpio_t){.port = 7, .bank = GPIO_B, .idx = 3}, 1);
+ gpio_output(GPIO(7, B, 3), 1);
}
static void configure_sdmmc(void)
{
/* Configure GPIO for sd_en */
- gpio_output((gpio_t){.port = 7, .bank = GPIO_C, .idx = 5}, 1);
+ gpio_output(GPIO(7, C, 5), 1);
/* Configure GPIO for sd_detec */
- gpio_input_pullup((gpio_t){.port = 7, .bank = GPIO_A, .idx = 5});
+ gpio_input_pullup(GPIO(7, A, 5));
/*use sdmmc0 io, disable JTAG function*/
writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
@@ -100,7 +100,7 @@ static void configure_sdmmc(void)
static void configure_emmc(void)
{
/* Configure GPIO for emmc_pwrctrl */
- gpio_output((gpio_t){.port = 7, .bank = GPIO_B, .idx = 4}, 1);
+ gpio_output(GPIO(7, B, 4), 1);
}
static void configure_i2s(void)
diff --git a/src/mainboard/google/veyron_pinky/reset.c b/src/mainboard/google/veyron_pinky/reset.c
index fa90f54..d769665 100644
--- a/src/mainboard/google/veyron_pinky/reset.c
+++ b/src/mainboard/google/veyron_pinky/reset.c
@@ -23,6 +23,6 @@
void hard_reset(void)
{
- gpio_output((gpio_t){.port = 0, .bank = GPIO_B, .idx = 2}, 1);
+ gpio_output(GPIO(0, B, 2), 1);
while (1);
}
diff --git a/src/mainboard/google/veyron_pinky/sdram_configs.c b/src/mainboard/google/veyron_pinky/sdram_configs.c
index b3600fb..21a483c 100644
--- a/src/mainboard/google/veyron_pinky/sdram_configs.c
+++ b/src/mainboard/google/veyron_pinky/sdram_configs.c
@@ -42,10 +42,10 @@ static struct rk3288_sdram_params sdram_configs[] = {
#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */
};
-#define GPIO_RAMCODE0 (gpio_t){.port = 8, .bank = GPIO_A, .idx = 0}
-#define GPIO_RAMCODE1 (gpio_t){.port = 8, .bank = GPIO_A, .idx = 1}
-#define GPIO_RAMCODE2 (gpio_t){.port = 8, .bank = GPIO_A, .idx = 2}
-#define GPIO_RAMCODE3 (gpio_t){.port = 8, .bank = GPIO_A, .idx = 3}
+#define GPIO_RAMCODE0 GPIO(8, A, 0)
+#define GPIO_RAMCODE1 GPIO(8, A, 1)
+#define GPIO_RAMCODE2 GPIO(8, A, 2)
+#define GPIO_RAMCODE3 GPIO(8, A, 3)
u32 sdram_get_ram_code(void)
{
diff --git a/src/soc/rockchip/rk3288/gpio.h b/src/soc/rockchip/rk3288/gpio.h
index 6cac6cb..7049ddf 100644
--- a/src/soc/rockchip/rk3288/gpio.h
+++ b/src/soc/rockchip/rk3288/gpio.h
@@ -23,6 +23,8 @@
#include "addressmap.h"
#include "grf.h"
+#define GPIO(p, b, i) ((gpio_t){.port = p, .bank = GPIO_##b, .idx = i})
+
struct rk3288_gpio_regs {
u32 swporta_dr;
u32 swporta_ddr;
More information about the coreboot-gerrit
mailing list