[coreboot-gerrit] Patch set updated for coreboot: ba35830 libpayload ehci: Use 64-byte aligned data structures for periodic transfers

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Sat Mar 21 01:42:53 CET 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8738

-gerrit

commit ba35830f6882f27f8ee6fdd45d80295e3dc64c27
Author: Jim Lin <jilin at nvidia.com>
Date:   Tue Sep 16 16:39:08 2014 +0800

    libpayload ehci: Use 64-byte aligned data structures for periodic transfers
    
    Chapter 3.1 "Periodic Frame List" of EHCI 1.0 specification says
    "Frame List Link pointers always reference memory objects that are
    32-byte aligned."
    jwerner at chromium.org suggests setting it to be 64-byte aligned for
    consistency with other EHCI queue structures.
    
    BUG=chrome-os-partner:31993
    TEST=Tested on nyan platform. Before adding patch, USB keyboard behind
    an external hub is not working to switch between "Default Locale" and
    "English" (after pressing ESC+REFRESH+POWER on embedded keyboard and
    later Left/Right-Arrow key on USB keyboard).
    
    Change-Id: Ie6259f2df20ae2618c2074e831fad087f227091d
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 23fc02e6ba3b17be4eaf18810ec6fc0d9c0e0b9a
    Original-Change-Id: If52ddc43ebd5d509c19f104928dced5bd09b1706
    Original-Signed-off-by: Jim Lin <jilin at nvidia.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/218403
    Original-Reviewed-by: Tom Warren <twarren at nvidia.com>
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
 payloads/libpayload/drivers/usb/ehci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c
index 1d019b0..c9ababd 100644
--- a/payloads/libpayload/drivers/usb/ehci.c
+++ b/payloads/libpayload/drivers/usb/ehci.c
@@ -634,7 +634,8 @@ static void *ehci_create_intr_queue(
 			return NULL;
 	}
 
-	intr_queue_t *const intrq = (intr_queue_t *)malloc(sizeof(intr_queue_t));
+	intr_queue_t *const intrq = (intr_queue_t *)dma_memalign(64,
+		sizeof(intr_queue_t));
 	/*
 	 * reqcount data chunks
 	 * plus one more spare, which we'll leave out of queue



More information about the coreboot-gerrit mailing list