[coreboot-gerrit] Patch merged into coreboot/master: amd/pi/hudson: Fill ROMSIG with 0xFF instead of 0

gerrit at coreboot.org gerrit at coreboot.org
Thu Jun 25 04:07:02 CEST 2015


the following patch was just integrated into master:
commit 3ad1f1ca5fb35d698359c88baaa57939a258639a
Author: zbao <fishbaozi at gmail.com>
Date:   Wed Jun 17 20:03:29 2015 -0400

    amd/pi/hudson: Fill ROMSIG with 0xFF instead of 0
    
    Besides the first five DWORDs, the offsets 0x40 & 0x41
    are used to save SPI settings. They should only be 0xFF
    for being written.
    
    Other parts in ROMSIG are also changed to 0xFF for potential
    requirement.
    
    Change-Id: I61ea8295d5ee8ffbbd0cfcf9e4bece770d70e1f2
    Signed-off-by: Zheng Bao <zheng.bao at amd.com>
    Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
    Reviewed-on: http://review.coreboot.org/10651
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/10651 for details.

-gerrit



More information about the coreboot-gerrit mailing list