[coreboot-gerrit] New patch to review for coreboot: soc/intel/common/Kconfig: Fix warning & whitespace

Martin Roth (gaumless@gmail.com) gerrit at coreboot.org
Thu Jun 25 03:05:53 CEST 2015


Martin Roth (gaumless at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10654

-gerrit

commit 4dcb1e1769f8fd81b9f4391da33a64e615d8c673
Author: Martin Roth <gaumless at gmail.com>
Date:   Wed Jun 24 19:04:16 2015 -0600

    soc/intel/common/Kconfig: Fix warning & whitespace
    
    Because of a missing close quote, we have the warning:
    src/soc/intel/common/Kconfig:52:warning:multi-line strings not supported
    
    This was added in commit 0946ec37 -Intel Common SOC:Add romstage support
    
    The whitespace issue - using spaces instead of a leading tab was added
    in the same commit.
    
    Change-Id: I429c66afb5a7e10ca0e0ef619ac46722c63fb376
    Signed-off-by: Martin Roth <gaumless at gmail.com>
---
 src/soc/intel/common/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 7b88d55..75e585d 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -40,7 +40,7 @@ config CHIPSET_RESERVED_MEM_BYTES
 	hex "Size in bytes of chipset reserved memory area"
 	default 0
 	help
-          If insufficient documentation is available to determine the size of
+	  If insufficient documentation is available to determine the size of
 	  the chipset reserved memory area by walking the chipset registers,
 	  the CHIPSET_RESERVED_MEM_BYTES may be used as a workaround to account
 	  for the missing pieces of memory.  The value specified in bytes is:
@@ -49,7 +49,7 @@ config CHIPSET_RESERVED_MEM_BYTES
 	  by reading chipset registers)
 
 config DISPLAY_MTRRS
-	bool "MTRRs: Display the MTRR settings
+	bool "MTRRs: Display the MTRR settings"
 	default n
 
 config DISPLAY_SMM_MEMORY_MAP



More information about the coreboot-gerrit mailing list