[coreboot-gerrit] Patch set updated for coreboot: vendorcode: 64bit fixes for AMD CIMX SB800

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10573

-gerrit

commit bf7948903244c0f3c8612c9a8da4515913dd6a69
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date:   Wed Jun 17 16:05:05 2015 -0700

    vendorcode: 64bit fixes for AMD CIMX SB800
    
    Make SB800 code compile with x64 compiler
    
    These fixes probably apply 1:1 to the other SB components
    in that directory.
    
    Change-Id: I9ff9f27dff5074d2faf41ebc14bfe50871d9c7f7
    Signed-off-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
    Signed-off-by: Scott Duplichan <scott at notabs.org>
---
 src/vendorcode/amd/cimx/sb800/DISPATCHER.c | 8 ++------
 src/vendorcode/amd/cimx/sb800/Makefile.inc | 5 +++++
 src/vendorcode/amd/cimx/sb800/SBMAIN.c     | 2 +-
 3 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/src/vendorcode/amd/cimx/sb800/DISPATCHER.c b/src/vendorcode/amd/cimx/sb800/DISPATCHER.c
index 84bbccb..8b35047 100644
--- a/src/vendorcode/amd/cimx/sb800/DISPATCHER.c
+++ b/src/vendorcode/amd/cimx/sb800/DISPATCHER.c
@@ -183,11 +183,7 @@ LocateImage (
   ImagePtr = 0xffffffff - (IMAGE_ALIGN - 1);
 
   while ( ImagePtr >= (0xfffffff - (NUM_IMAGE_LOCATION * IMAGE_ALIGN - 1)) ) {
-#ifdef x64
-    12346789
-#else
-    Result = VerifyImage (Signature, (VOID*) ImagePtr);
-#endif
+    Result = VerifyImage (Signature, (VOID*)(UINTN)ImagePtr);
     if ( Result != NULL ) {
       return Result;
     }
@@ -244,7 +240,7 @@ saveConfigPointer (
   UINT8   i;
   UINT32   ddValue;
 
-  ddValue =  (UINT32) (UINTN)pConfig;
+  ddValue =  (UINT32) (UINTN)pConfig; // Needs to live below 4G
   dbReg = SB_ECMOS_REG08;
 
   for ( i = 0; i <= 3; i++ ) {
diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc
index 96cae03..fde6239 100644
--- a/src/vendorcode/amd/cimx/sb800/Makefile.inc
+++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc
@@ -22,6 +22,11 @@ CPPFLAGS_x86_32 += -I$(src)/southbridge/amd/cimx/sb800
 CPPFLAGS_x86_32 += -I$(src)/include/cpu/amd/common
 CPPFLAGS_x86_32 += -I$(src)/vendorcode/amd/cimx/sb800
 
+CPPFLAGS_x86_64 += -I$(src)/mainboard/$(MAINBOARDDIR)
+CPPFLAGS_x86_64 += -I$(src)/southbridge/amd/cimx/sb800
+CPPFLAGS_x86_64 += -I$(src)/include/cpu/amd/common
+CPPFLAGS_x86_64 += -I$(src)/vendorcode/amd/cimx/sb800
+
 romstage-y += ACPILIB.c
 romstage-y += AZALIA.c
 romstage-y += DISPATCHER.c
diff --git a/src/vendorcode/amd/cimx/sb800/SBMAIN.c b/src/vendorcode/amd/cimx/sb800/SBMAIN.c
index eb21770..a494d30 100644
--- a/src/vendorcode/amd/cimx/sb800/SBMAIN.c
+++ b/src/vendorcode/amd/cimx/sb800/SBMAIN.c
@@ -240,7 +240,7 @@ sbSmmAcpiOn (
  * @param[in] Data    Callback specific data.
  * @param[in] pConfig Southbridge configuration structure pointer.
  */
-UINTN
+UINT32
 CallBackToOEM (
   IN       UINT32 Func,
   IN       UINT32 Data,