[coreboot-gerrit] Patch set updated for coreboot: 4e6d4fb sandy/ivy: Include IRQ routes from platform
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Sat Jun 6 10:53:20 CEST 2015
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10442
-gerrit
commit 4e6d4fbfa1ef3e83054846b3857f2c73ab1f403e
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Sat Jun 6 11:03:12 2015 +0300
sandy/ivy: Include IRQ routes from platform
The default route does work for all Chromebooks and is replaced
with platform-specific one in follow-up.
Change-Id: Ia1839ed38dacf44a89dc757394d054e17666f193
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl | 1 +
src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl | 1 +
src/mainboard/google/butterfly/dsdt.asl | 1 +
src/mainboard/google/link/dsdt.asl | 1 +
src/mainboard/google/parrot/dsdt.asl | 1 +
src/mainboard/google/stout/dsdt.asl | 1 +
src/mainboard/intel/emeraldlake2/dsdt.asl | 1 +
src/mainboard/kontron/ktqm77/dsdt.asl | 1 +
src/mainboard/lenovo/t420s/dsdt.asl | 1 +
src/mainboard/lenovo/t430s/dsdt.asl | 1 +
src/mainboard/lenovo/t520/dsdt.asl | 1 +
src/mainboard/lenovo/t530/dsdt.asl | 1 +
src/mainboard/lenovo/x201/dsdt.asl | 1 +
src/mainboard/lenovo/x220/dsdt.asl | 1 +
src/mainboard/lenovo/x230/dsdt.asl | 1 +
src/mainboard/packardbell/ms2290/dsdt.asl | 1 +
src/mainboard/samsung/lumpy/dsdt.asl | 1 +
src/mainboard/samsung/stumpy/dsdt.asl | 1 +
.../intel/bd82x6x/acpi/default_irq_route.asl | 71 ++++++++++++++++++++++
src/southbridge/intel/bd82x6x/acpi/irq.asl | 71 ----------------------
src/southbridge/intel/bd82x6x/acpi/pch.asl | 2 -
21 files changed, 89 insertions(+), 73 deletions(-)
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl
index e79d611..9350dea 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl
@@ -21,6 +21,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
}
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl
index e79d611..9350dea 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl
@@ -21,6 +21,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
}
diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl
index 98fe4d0..0a2f37d 100644
--- a/src/mainboard/google/butterfly/dsdt.asl
+++ b/src/mainboard/google/butterfly/dsdt.asl
@@ -48,6 +48,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl
index bac0747..a01533f 100644
--- a/src/mainboard/google/link/dsdt.asl
+++ b/src/mainboard/google/link/dsdt.asl
@@ -48,6 +48,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl
index 98fe4d0..0a2f37d 100644
--- a/src/mainboard/google/parrot/dsdt.asl
+++ b/src/mainboard/google/parrot/dsdt.asl
@@ -48,6 +48,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl
index b242b17..01e4001 100644
--- a/src/mainboard/google/stout/dsdt.asl
+++ b/src/mainboard/google/stout/dsdt.asl
@@ -48,6 +48,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl
index 2e44b78..b545838 100644
--- a/src/mainboard/intel/emeraldlake2/dsdt.asl
+++ b/src/mainboard/intel/emeraldlake2/dsdt.asl
@@ -47,6 +47,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl
index c991fa6..9dbe7e5 100644
--- a/src/mainboard/kontron/ktqm77/dsdt.asl
+++ b/src/mainboard/kontron/ktqm77/dsdt.asl
@@ -48,6 +48,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl
index 27dcf54..64e4e9f 100644
--- a/src/mainboard/lenovo/t420s/dsdt.asl
+++ b/src/mainboard/lenovo/t420s/dsdt.asl
@@ -50,6 +50,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl
index 27dcf54..64e4e9f 100644
--- a/src/mainboard/lenovo/t430s/dsdt.asl
+++ b/src/mainboard/lenovo/t430s/dsdt.asl
@@ -50,6 +50,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl
index c8591a4..f5f3ace 100644
--- a/src/mainboard/lenovo/t520/dsdt.asl
+++ b/src/mainboard/lenovo/t520/dsdt.asl
@@ -49,6 +49,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl
index c8591a4..f5f3ace 100644
--- a/src/mainboard/lenovo/t530/dsdt.asl
+++ b/src/mainboard/lenovo/t530/dsdt.asl
@@ -49,6 +49,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl
index 3f5fe2e..f2f0a89 100644
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@@ -49,6 +49,7 @@ DefinitionBlock(
{
#include <northbridge/intel/nehalem/acpi/nehalem.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
Device (UNCR)
{
diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl
index c8591a4..f5f3ace 100644
--- a/src/mainboard/lenovo/x220/dsdt.asl
+++ b/src/mainboard/lenovo/x220/dsdt.asl
@@ -49,6 +49,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl
index 8c713c7..1c71c3c 100644
--- a/src/mainboard/lenovo/x230/dsdt.asl
+++ b/src/mainboard/lenovo/x230/dsdt.asl
@@ -49,6 +49,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
/*
diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl
index 5fb43f3..c2d96f3 100644
--- a/src/mainboard/packardbell/ms2290/dsdt.asl
+++ b/src/mainboard/packardbell/ms2290/dsdt.asl
@@ -43,6 +43,7 @@ DefinitionBlock(
{
#include <northbridge/intel/nehalem/acpi/nehalem.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
Device (UNCR)
{
diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl
index 6fdbe03..1ab6322 100644
--- a/src/mainboard/samsung/lumpy/dsdt.asl
+++ b/src/mainboard/samsung/lumpy/dsdt.asl
@@ -50,6 +50,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl
index 98fe4d0..0a2f37d 100644
--- a/src/mainboard/samsung/stumpy/dsdt.asl
+++ b/src/mainboard/samsung/stumpy/dsdt.asl
@@ -48,6 +48,7 @@ DefinitionBlock(
{
#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
+ #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl>
}
}
diff --git a/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl b/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
new file mode 100644
index 0000000..3bde17b
--- /dev/null
+++ b/src/southbridge/intel/bd82x6x/acpi/default_irq_route.asl
@@ -0,0 +1,71 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+/* PCI Interrupt Routing */
+Method(_PRT)
+{
+ If (PICM) {
+ Return (Package() {
+ /* Onboard graphics (IGD) 0:2.0 */
+ Package() { 0x0002ffff, 0, 0, 16 },/* GFX INTA -> PIRQA (MSI) */
+ /* XHCI 0:14.0 (ivy only) */
+ Package() { 0x0014ffff, 0, 0, 19 },
+ /* High Definition Audio 0:1b.0 */
+ Package() { 0x001bffff, 0, 0, 16 },/* D27IP_ZIP HDA INTA -> PIRQA (MSI) */
+ /* PCIe Root Ports 0:1c.x */
+ Package() { 0x001cffff, 0, 0, 17 },/* D28IP_P1IP PCIe INTA -> PIRQB */
+ Package() { 0x001cffff, 1, 0, 21 },/* D28IP_P2IP PCIe INTB -> PIRQF */
+ Package() { 0x001cffff, 2, 0, 19 },/* D28IP_P3IP PCIe INTC -> PIRQD */
+ Package() { 0x001cffff, 3, 0, 20 },/* D28IP_P3IP PCIe INTD -> PIRQE */
+ /* EHCI #1 0:1d.0 */
+ Package() { 0x001dffff, 0, 0, 19 },/* D29IP_E1P EHCI1 INTA -> PIRQD */
+ /* EHCI #2 0:1a.0 */
+ Package() { 0x001affff, 0, 0, 21 },/* D26IP_E2P EHCI2 INTA -> PIRQF */
+ /* LPC devices 0:1f.0 */
+ Package() { 0x001fffff, 0, 0, 17 }, /* D31IP_SIP SATA INTA -> PIRQB (MSI) */
+ Package() { 0x001fffff, 1, 0, 23 }, /* D31IP_SMIP SMBUS INTB -> PIRQH */
+ Package() { 0x001fffff, 2, 0, 16 }, /* D31IP_TTIP THRT INTC -> PIRQA */
+ Package() { 0x001fffff, 3, 0, 18 },
+ })
+ } Else {
+ Return (Package() {
+ /* Onboard graphics (IGD) 0:2.0 */
+ Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ /* XHCI 0:14.0 (ivy only) */
+ Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
+ /* High Definition Audio 0:1b.0 */
+ Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
+ /* PCIe Root Ports 0:1c.x */
+ Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
+ Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
+ Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },
+ Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },
+ /* EHCI #1 0:1d.0 */
+ Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
+ /* EHCI #2 0:1a.0 */
+ Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },
+ /* LPC device 0:1f.0 */
+ Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
+ Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKH, 0 },
+ Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 },
+ Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },
+ })
+ }
+}
diff --git a/src/southbridge/intel/bd82x6x/acpi/irq.asl b/src/southbridge/intel/bd82x6x/acpi/irq.asl
deleted file mode 100644
index 3bde17b..0000000
--- a/src/southbridge/intel/bd82x6x/acpi/irq.asl
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007-2009 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; version 2 of
- * the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-/* PCI Interrupt Routing */
-Method(_PRT)
-{
- If (PICM) {
- Return (Package() {
- /* Onboard graphics (IGD) 0:2.0 */
- Package() { 0x0002ffff, 0, 0, 16 },/* GFX INTA -> PIRQA (MSI) */
- /* XHCI 0:14.0 (ivy only) */
- Package() { 0x0014ffff, 0, 0, 19 },
- /* High Definition Audio 0:1b.0 */
- Package() { 0x001bffff, 0, 0, 16 },/* D27IP_ZIP HDA INTA -> PIRQA (MSI) */
- /* PCIe Root Ports 0:1c.x */
- Package() { 0x001cffff, 0, 0, 17 },/* D28IP_P1IP PCIe INTA -> PIRQB */
- Package() { 0x001cffff, 1, 0, 21 },/* D28IP_P2IP PCIe INTB -> PIRQF */
- Package() { 0x001cffff, 2, 0, 19 },/* D28IP_P3IP PCIe INTC -> PIRQD */
- Package() { 0x001cffff, 3, 0, 20 },/* D28IP_P3IP PCIe INTD -> PIRQE */
- /* EHCI #1 0:1d.0 */
- Package() { 0x001dffff, 0, 0, 19 },/* D29IP_E1P EHCI1 INTA -> PIRQD */
- /* EHCI #2 0:1a.0 */
- Package() { 0x001affff, 0, 0, 21 },/* D26IP_E2P EHCI2 INTA -> PIRQF */
- /* LPC devices 0:1f.0 */
- Package() { 0x001fffff, 0, 0, 17 }, /* D31IP_SIP SATA INTA -> PIRQB (MSI) */
- Package() { 0x001fffff, 1, 0, 23 }, /* D31IP_SMIP SMBUS INTB -> PIRQH */
- Package() { 0x001fffff, 2, 0, 16 }, /* D31IP_TTIP THRT INTC -> PIRQA */
- Package() { 0x001fffff, 3, 0, 18 },
- })
- } Else {
- Return (Package() {
- /* Onboard graphics (IGD) 0:2.0 */
- Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- /* XHCI 0:14.0 (ivy only) */
- Package() { 0x0014ffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- /* High Definition Audio 0:1b.0 */
- Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
- /* PCIe Root Ports 0:1c.x */
- Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKF, 0 },
- Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKD, 0 },
- Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKE, 0 },
- /* EHCI #1 0:1d.0 */
- Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKD, 0 },
- /* EHCI #2 0:1a.0 */
- Package() { 0x001affff, 0, \_SB.PCI0.LPCB.LNKF, 0 },
- /* LPC device 0:1f.0 */
- Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
- Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKH, 0 },
- Package() { 0x001fffff, 2, \_SB.PCI0.LPCB.LNKA, 0 },
- Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKC, 0 },
- })
- }
-}
diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl
index 158911e..974cac5 100644
--- a/src/southbridge/intel/bd82x6x/acpi/pch.asl
+++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl
@@ -256,8 +256,6 @@ Scope(\)
// SMBus 0:1f.3
#include "smbus.asl"
-#include "irq.asl"
-
Method (_OSC, 4)
{
/* Check for XHCI */
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