[coreboot-gerrit] Patch merged into coreboot/master: Add SoC specific microcode update check in ramstage

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 30b755be2b798c228745661393efd8f2fe42e6d8
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date:   Thu Jul 23 22:31:51 2015 +0530

    Add SoC specific microcode update check in ramstage
    
    Some Intel SoCs which support SGX feature, report the
    microcode patch revision one less than the actual revision.
    This results in the same microcode patch getting loaded again.
    Add a SoC specific check to avoid reloading the same patch.
    
    BUG=chrome-os-partner:42046
    BRANCH=None
    TEST=Built for glados and tested on RVP3
    CQ-DEPEND=CL:286054
    
    Change-Id: Iab4c34c6c55119045947f598e89352867c67dcb8
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: ab2ed73db3581cd432f9bc84acca47f5e53a0e9b
    Original-Change-Id: I4f7bf9c841e5800668208c11b0afcf8dba48a775
    Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/287513
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/11055
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
    Tested-by: build bot (Jenkins)


See http://review.coreboot.org/11055 for details.

-gerrit