[coreboot-gerrit] Patch set updated for coreboot: veyron: update mickey sdram-lpddr3-samsung-2GB.inc
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Wed Jul 29 11:00:53 CEST 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11051
-gerrit
commit 109d0d887284cb891bb285550fd7b5fca50469f2
Author: jinkun.hong <jinkun.hong at rock-chips.com>
Date: Thu Jul 23 11:51:51 2015 +0800
veyron: update mickey sdram-lpddr3-samsung-2GB.inc
Modify MR3_I/O Configuration, Change 34.3 ohms to 60 ohms. This
resolves an issue that was observed on some Mickey boards with
the Samsung 2GB LPDDR3 and is believed to be caused by inferior
routing on the small PCB. (Elpida 2GB LPDDR3 seems unaffected.)
BUG=chrome-os-partner:41905
TEST=Boot from mickey
BRANCH=None
Change-Id: Ic20d9eceb00658c214fd032a2f213dbe0d51a91b
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 1305010aee6818910ad1dec26d9d948505ca281e
Original-Change-Id: I5517e07fc5716ed4cd58e5502f13ccd61ffb5357
Original-Signed-off-by: jinkun.hong <jinkun.hong at rock-chips.com>
Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/286333
---
.../google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc
index 0f15ba5..cc39f62 100644
--- a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc
+++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-samsung-2GB.inc
@@ -65,7 +65,8 @@
.mr[0] = 0x0,
.mr[1] = 0xC3,
.mr[2] = 0x6,
- .mr[3] = 0x1
+ /* 60Ohms instead of 34.3 due to bad PCB routing on Mickey. */
+ .mr[3] = 0x4
},
.noc_timing = 0x20D266A4,
.noc_activate = 0x5B6,
More information about the coreboot-gerrit
mailing list