[coreboot-gerrit] Patch set updated for coreboot: 62258c3 OxPCIe: Fix UART base addresses

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8780

-gerrit

commit 62258c30bb1576c8fe9331fa657bcf7e9da51366
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Fri Mar 20 08:51:57 2015 +0200

    OxPCIe: Fix UART base addresses
    
    The offset of 0x2000 was for a configuration with two separate OxPCIe
    chips. The setup we support is a single chip with 8 UART pors.
    
    Change-Id: If4be046a14464af7b90b86aca5464c6b3400dffc
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/drivers/uart/oxpcie_early.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c
index 9daafc5..d560513 100644
--- a/src/drivers/uart/oxpcie_early.c
+++ b/src/drivers/uart/oxpcie_early.c
@@ -30,7 +30,6 @@
 
 static unsigned int oxpcie_present CAR_GLOBAL;
 static ROMSTAGE_CONST u32 uart0_base = CONFIG_EARLY_PCI_MMIO_BASE + 0x1000;
-static ROMSTAGE_CONST u32 uart1_base = CONFIG_EARLY_PCI_MMIO_BASE + 0x2000;
 
 int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base)
 {
@@ -79,10 +78,8 @@ static int oxpcie_uart_active(void)
 
 uintptr_t uart_platform_base(int idx)
 {
-	if (idx == 0 && oxpcie_uart_active())
-		return uart0_base;
-	if (idx == 1 && oxpcie_uart_active())
-		return uart1_base;
+	if ((idx >= 0) && (idx < 8) && oxpcie_uart_active())
+		return uart0_base + idx * 0x200;
 	return 0;
 }
 
@@ -90,7 +87,6 @@ uintptr_t uart_platform_base(int idx)
 void oxford_remap(u32 new_base)
 {
 	uart0_base = new_base + 0x1000;
-	uart1_base = new_base + 0x2000;
 }
 
 void uart_fill_lb(void *data)