[coreboot-gerrit] New patch to review for coreboot: 3fc27a5 armv8/secmon: Correct names for SMC macros

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9924

-gerrit

commit 3fc27a595c4b191e85c9cc5e2d22c770fee95207
Author: Furquan Shaikh <furquan at google.com>
Date:   Thu Apr 9 08:21:01 2015 -0700

    armv8/secmon: Correct names for SMC macros
    
    We support SMC32 calls from AARCH64, however we do not support SMC32
    calls from AARCH32. Reflect this policy in the code by using
    appropriate names for exception type check in SMC handler.
    
    BUG=None
    BRANCH=None
    TEST=Compiles successfully and able to turn CPU1 on and off using psci commands.
    
    Change-Id: Ifc3c9e2fe0c4e6e395f2647769a2d07f5f41f57f
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: cbaf712c2c45273a9eb0b0808a0d4d0630023fdd
    Original-Change-Id: I133b2c0bbc4968401a028382532bd051d6298802
    Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/265621
    Original-Trybot-Ready: Furquan Shaikh <furquan at chromium.org>
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
---
 src/arch/arm64/armv8/secmon/smc.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/src/arch/arm64/armv8/secmon/smc.c b/src/arch/arm64/armv8/secmon/smc.c
index ae0f130..35f38c1 100644
--- a/src/arch/arm64/armv8/secmon/smc.c
+++ b/src/arch/arm64/armv8/secmon/smc.c
@@ -26,8 +26,10 @@
 #include <console/console.h>
 
 enum {
-	EC_SMC32 = 0x13,
-	EC_SMC64 = 0x17,
+	/* SMC called from AARCH32 */
+	EC_SMC_AARCH32 = 0x13,
+	/* SMC called from AARCH64 */
+	EC_SMC_AARCH64 = 0x17,
 
 	SMC_NUM_RANGES = 8,
 };
@@ -109,12 +111,12 @@ static int smc_handler(struct exc_state *state, uint64_t vector_id)
 	esr = raw_read_esr_el3();
 	exception_class = (esr >> 26) & 0x3f;
 
-	/* No support for 32-bit SMC calls. */
-	if (exception_class == EC_SMC32)
+	/* No support for SMC calls from AARCH32 */
+	if (exception_class == EC_SMC_AARCH32)
 		return smc_return_with_error(state, smc);
 
-	/* Check to ensure this is an SMC from aarch64. */
-	if (exception_class != EC_SMC64)
+	/* Check to ensure this is an SMC from AARCH64. */
+	if (exception_class != EC_SMC_AARCH64)
 		return EXC_RET_IGNORED;
 
 	/* Ensure immediate value is 0. */