[coreboot-gerrit] New patch to review for coreboot: 7917191 arm64: Add arch_program_segment_loaded call to arm64

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Tue Apr 21 15:18:54 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9904

-gerrit

commit 7917191b6c9aac5bf15299ffa4cb74c3cd0f31e7
Author: Furquan Shaikh <furquan at google.com>
Date:   Tue Mar 31 22:59:25 2015 -0700

    arm64: Add arch_program_segment_loaded call to arm64
    
    arch_program_segment_loaded ensures that the program segment loaded is
    synced back from the cache to PoC. dcache_flush_all on arm64 does not
    guarantee PoC in case of MP systems. Thus, it is important to track
    and sync back all the required segments using
    arch_program_segment_loaded.
    
    BUG=chrome-os-partner:38231
    BRANCH=None
    TEST=Compiles successfully and boots to kernel prompt on smaug
    
    Change-Id: Ic6fcc7e5e0cccbab317950f8abab0c494041d19a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 284e3784854f764159b64286cea366c66b6bce2c
    Original-Change-Id: I5c35b9aa2ae9b5c1f2fcdef40ffb1cde7f49cc1a
    Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/263327
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
    Original-Trybot-Ready: Furquan Shaikh <furquan at chromium.org>
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
---
 payloads/libpayload/arch/arm64/cache.c         | 6 ++++++
 payloads/libpayload/include/arm64/arch/cache.h | 3 +++
 2 files changed, 9 insertions(+)

diff --git a/payloads/libpayload/arch/arm64/cache.c b/payloads/libpayload/arch/arm64/cache.c
index 799e2d2..0755c56 100644
--- a/payloads/libpayload/arch/arm64/cache.c
+++ b/payloads/libpayload/arch/arm64/cache.c
@@ -122,3 +122,9 @@ void cache_sync_instructions(void)
 	dcache_clean_all();	/* includes trailing DSB (in assembly) */
 	icache_invalidate_all(); /* includes leading DSB and trailing ISB */
 }
+
+void arch_program_segment_loaded(void const *addr, size_t len)
+{
+	dcache_clean_invalidate_by_mva(addr, len);
+	icache_invalidate_all();
+}
diff --git a/payloads/libpayload/include/arm64/arch/cache.h b/payloads/libpayload/include/arm64/arch/cache.h
index 7577758..7248869 100644
--- a/payloads/libpayload/include/arm64/arch/cache.h
+++ b/payloads/libpayload/include/arm64/arch/cache.h
@@ -100,6 +100,9 @@ void dcache_mmu_enable(void);
 /* perform all icache/dcache maintenance needed after loading new code */
 void cache_sync_instructions(void);
 
+/* Ensure that loaded program segment is synced back from cache to PoC */
+void arch_program_segment_loaded(void const *addr, size_t len);
+
 /* tlb invalidate all */
 void tlb_invalidate_all(void);
 



More information about the coreboot-gerrit mailing list