[coreboot-gerrit] Patch merged into coreboot/master: 51ad6ac pistachio: Decrease DDR ODT from 75R to 50R

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 51ad6ac695c5353d66210b9ed77e420eb9a520ef
Author: Ionela Voinescu <ionela.voinescu at imgtec.com>
Date:   Thu Mar 5 17:11:14 2015 +0000

    pistachio: Decrease DDR ODT from 75R to 50R
    
    The DDR On Die Termination was incorrectly configured at 75R,
    where as the data sheet suggests for DDR2-800 it should be
    set to 50R.
    
    Correct this by adjusting the ODT setting in the EMR register.
    
    BUG=chrome-os-partner:31438, chrome-os-partner:37087
    TEST=tested on Pistachio bring up board -> DDR initialized
         properly and ramstage executed correctly
    BRANCH=none
    
    Change-Id: I2f0242c422b1cb3d1f64ce3dd17b62fef5e7e155
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: ac081ac59c0dc3d16a7b540cd379fb870b6cfe40
    Original-Change-Id: If7951812033c4e88f4be3c143fb49526eddba142
    Original-Signed-off-by: Ionela Voinescu <ionela.voinescu at imgtec.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/256304
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
    Reviewed-on: http://review.coreboot.org/9846
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/9846 for details.

-gerrit