[coreboot-gerrit] New patch to review for coreboot: 7646d98 ipq806x: i2c: write function fixed to avoid spurious success

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Mon Apr 20 10:59:19 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9823

-gerrit

commit 7646d9877a2125bb3ce8f838cca6fd86d8347239
Author: Sourabh Banerjee <sbanerje at codeaurora.org>
Date:   Fri Feb 27 19:18:11 2015 +0530

    ipq806x: i2c: write function fixed to avoid spurious success
    
    The qup_i2c_write_fifo() made to query QUP_I2C_MASTER_STATUS after QUP
    transitions into PAUSE state to ensure that it captures the correct status.
    Handled more error bits.
    
    BRANCH=chromeos-2013.04
    BUG=chrome-os-partner:35328
    TEST=Booted up storm P0.2, verified that the TPM on GSBI1 works.
         Verified that SUCCESS is not reported when the write FIFO has failed.
    
    Change-Id: Ia91638d37b3fa8449630aa2cf932114363b2db78
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 75e0d59d2e6ba03182003f22944dbf99ce3eb412
    Original-Change-Id: Ic4e8e85686499ce71ad3258b52e687ceff36a1f8
    Original-Signed-off-by: Sourabh Banerjee <sbanerje at codeaurora.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/254495
    Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Commit-Queue: Vadim Bendebury <vbendeb at chromium.org>
---
 src/soc/qualcomm/ipq806x/include/soc/qup.h | 5 +++++
 src/soc/qualcomm/ipq806x/qup.c             | 8 +++++++-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/soc/qualcomm/ipq806x/include/soc/qup.h b/src/soc/qualcomm/ipq806x/include/soc/qup.h
index a12f6c5..5168b19 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/qup.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/qup.h
@@ -109,7 +109,9 @@
 #define QUP_I2C_INVALID_READ_ADDR	(1 << 24)
 #define QUP_I2C_INVALID_TAG		(1 << 23)
 #define QUP_I2C_FAILED_MASK		(0x3 << 6)
+#define QUP_I2C_INVALID_WRITE		(1 << 5)
 #define QUP_I2C_ARB_LOST		(1 << 4)
+#define QUP_I2C_PACKET_NACK		(1 << 3)
 #define QUP_I2C_BUS_ERROR		(1 << 2)
 
 typedef enum {
@@ -123,6 +125,9 @@ typedef enum {
 	QUP_ERR_I2C_BUS_ERROR,
 	QUP_ERR_I2C_INVALID_SLAVE_ADDR,
 	QUP_ERR_XFER_FAIL,
+	QUP_ERR_I2C_NACK,
+	QUP_ERR_I2C_INVALID_WRITE,
+	QUP_ERR_I2C_INVALID_TAG,
 	QUP_ERR_UNDEFINED,
 } qup_return_t;
 
diff --git a/src/soc/qualcomm/ipq806x/qup.c b/src/soc/qualcomm/ipq806x/qup.c
index 72ba724..25adfc1 100644
--- a/src/soc/qualcomm/ipq806x/qup.c
+++ b/src/soc/qualcomm/ipq806x/qup.c
@@ -63,6 +63,12 @@ static qup_return_t qup_i2c_master_status(gsbi_id_t gsbi_id)
 		return QUP_ERR_I2C_ARB_LOST;
 	if (reg_val & QUP_I2C_BUS_ERROR)
 		return QUP_ERR_I2C_BUS_ERROR;
+	if (reg_val & QUP_I2C_INVALID_WRITE)
+		return QUP_ERR_I2C_INVALID_WRITE;
+	if (reg_val & QUP_I2C_PACKET_NACK)
+		return QUP_ERR_I2C_NACK;
+	if (reg_val & QUP_I2C_INVALID_TAG)
+		return QUP_ERR_I2C_INVALID_TAG;
 
 	return QUP_SUCCESS;
 }
@@ -193,7 +199,7 @@ static qup_return_t qup_i2c_write_fifo(gsbi_id_t gsbi_id, qup_data_t *p_tx_obj,
 		return ret;
 
 	qup_set_state(gsbi_id, QUP_STATE_PAUSE);
-	return QUP_SUCCESS;
+	return qup_i2c_master_status(gsbi_id);
 }
 
 static qup_return_t qup_i2c_write(gsbi_id_t gsbi_id, uint8_t mode,



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