[coreboot-gerrit] Patch merged into coreboot/master: b7641cc veyron: Activate Winbond SPI driver

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit b7641cc23003970cdb2c1fc3af8acba8ad79b638
Author: Julius Werner <jwerner at chromium.org>
Date:   Fri Dec 19 12:41:16 2014 -0800

    veyron: Activate Winbond SPI driver
    
    This patch activates the chip driver for Winbond SPI flash (which,
    incidentally, looks 99.9% the same as the Gigadevice driver but still
    requires some extra 500+ bytes of object code... there's definitely room
    for improvement here). Shuffle around rk3288 memlayout to make a little
    more room in the bootblock.
    
    BRANCH=veyron
    BUG=chrome-os-partner:34176
    TEST=Booted Pinky. Checked bootblock and verstage memsz of final binary
    and noticed that both only have less than 500 bytes left against their
    memlayout boundary. The next piece of code we add will cause some
    serious headaches...
    
    Change-Id: I97ea6ac334104e4219e310afc557c164b2ff19d9
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 8769e5a34ad3cd417132646fbb58ff51c29fb640
    Original-Change-Id: Id2f1204c30aa28251cf85cb80d7ca44947388dba
    Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/236977
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
    Reviewed-on: http://review.coreboot.org/9719
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/9719 for details.

-gerrit