[coreboot-gerrit] Patch merged into coreboot/master: 9e381a1 vbnv flash: use proper SPI flash offset for NVRAM

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 9e381a140f206d7bdec3a71fafafabcde4182b5d
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Sat Jan 10 23:11:43 2015 -0800

    vbnv flash: use proper SPI flash offset for NVRAM
    
    The current vbnv flash code mistakenly uses the offset into the NVRAM
    area as the absolute offset into the SPI NOR. This causes overwrites
    RO section of the flash (when it is not protected) and causes failures
    to retrieve the NVRAM contents by the user space apps.
    
    This patch makes sure that the correct offset is used when accessing
    NVRAM area in the SPI flash.
    
    BRANCH=storm
    BUG=chrome-os-partner:35316
    TEST=run the update code on storm.
     - no more RO section corruption observed
     - running 'crossystem recovery_request=1' at Linux prompt causes the
       next boot happen in recovery mode
    
    Change-Id: Iba96cd2e0e5e01c990f8c1de8d2a2233cd9e9bc9
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: 9fd15ff4b7aa77536723edbb94fa81f0ae767aed
    Original-Change-Id: I86fe4b9a35f7c16b72abf49cfbfcd42cc87937e3
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/240143
    Original-Reviewed-by: Daisuke Nojiri <dnojiri at chromium.org>
    Reviewed-on: http://review.coreboot.org/9561
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/9561 for details.

-gerrit