[coreboot-gerrit] New patch to review for coreboot: 29e9422 mips: HACK disable caches in bootblock startup code

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9569

-gerrit

commit 29e94223c0a3e6f63865ce4f39966437f93c79bb
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Sat Nov 29 14:35:49 2014 -0800

    mips: HACK disable caches in bootblock startup code
    
    Until proper MIPS cache management is available it is necessary to
    disable data and instruction caches, otherwise code placed in memory
    stays in data cache and is not available for instruction fetched.
    
    BRANCH=none
    BUG=chrome-os-partner:31438,chrome-os-partner:34127
    TEST=coreboot loading rombase and rambase now succeeds.
    
    Change-Id: I4147e1325edc0b9bb951cd7ce18d5f104f3eaec0
    Signed-off-by: Stefan Reinauer <reinauer at chromium.org>
    Original-Commit-Id: 93d5bfa1d01fbbabbabef33a22287ceeea28b15b
    Original-Change-Id: Ib195ed6e5f08ccaa6bbe3325c2199171bfb63b88
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/232191
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/arch/mips/bootblock.S | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/arch/mips/bootblock.S b/src/arch/mips/bootblock.S
index 8899fe0..ed31b24 100644
--- a/src/arch/mips/bootblock.S
+++ b/src/arch/mips/bootblock.S
@@ -36,6 +36,16 @@ _start:
 	bne	$t0, $t1, 1b
 	addi	$t0, $t0, 4
 
+	/*
+	 * Disable caches for now, proper cache management is coming soon.
+	 * http://crosbug.com/p/34127
+	 */
+	mfc0	$t0, $16
+	li	$t1, -8
+	and	$t0, $t0, $t1
+	ori	$t0, $t0, 2
+	mtc0	$t0, $16
+
 	/* Run main */
 	b	main