[coreboot-gerrit] New patch to review for coreboot: 673a30b tegra132: Pass panel spec to lib_sysinfo

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Fri Apr 10 13:17:44 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9519

-gerrit

commit 673a30b5b8c587bda235ca375020b32a94981c7f
Author: Jimmy Zhang <jimmzhang at nvidia.com>
Date:   Mon Nov 3 17:38:29 2014 -0800

    tegra132: Pass panel spec to lib_sysinfo
    
    panel spec such as resoultion, bits per pixel are
    needed to pass to depthcharge/payload for displaying
    bitmap onto panel.
    
    BRANCH=none
    BUG=chrome-os-partner:31936
    TEST=build and test on ryu
    
    Change-Id: I81b4d289699e7b0c2758ea1a009cbabaf8a2ce28
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: b9b42486f203d332f6068ccd6f4a1a982d327a6b
    Original-Change-Id: I5c8fde17d57e953582a1c1dc814be4c08e349847
    Original-Signed-off-by: Jimmy Zhang <jimmzhang at nvidia.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/227203
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/google/rush_ryu/Kconfig |  1 +
 src/soc/nvidia/tegra132/display.c     | 32 ++++++++++++++++++++++++++++++--
 2 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/google/rush_ryu/Kconfig b/src/mainboard/google/rush_ryu/Kconfig
index da517da..ac694a7 100644
--- a/src/mainboard/google/rush_ryu/Kconfig
+++ b/src/mainboard/google/rush_ryu/Kconfig
@@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select EC_GOOGLE_CHROMEEC_I2C
 	select EC_GOOGLE_CHROMEEC_I2C_PROTO3
 	select EC_SOFTWARE_SYNC
+	select MAINBOARD_DO_NATIVE_VGA_INIT
 	select SPI_FLASH
 	select SOC_NVIDIA_TEGRA132
 	select MAINBOARD_HAS_BOOTBLOCK_INIT
diff --git a/src/soc/nvidia/tegra132/display.c b/src/soc/nvidia/tegra132/display.c
index 62cea02..1708b5a 100644
--- a/src/soc/nvidia/tegra132/display.c
+++ b/src/soc/nvidia/tegra132/display.c
@@ -29,6 +29,7 @@
 #include <cpu/cpu.h>
 #include <boot/tables.h>
 #include <cbmem.h>
+#include <edid.h>
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/dc.h>
 #include <soc/funitcfg.h>
@@ -289,9 +290,36 @@ void display_startup(device_t dev)
 		return;
 	}
 
-	/* set up window */
+	/* Set up window */
 	update_window(config);
-
 	printk(BIOS_INFO, "%s: display init done.\n", __func__);
+
+	/*
+	 * Pass panel information to cb tables
+	 */
+	struct edid edid;
+	/* Align bytes_per_line to 64 bytes as required by dc */
+	edid.bytes_per_line = ALIGN_UP((config->xres *
+				config->framebuffer_bits_per_pixel / 8), 64);
+	edid.x_resolution = edid.bytes_per_line /
+				(config->framebuffer_bits_per_pixel / 8);
+	edid.y_resolution = config->yres;
+	edid.framebuffer_bits_per_pixel = config->framebuffer_bits_per_pixel;
+
+	printk(BIOS_INFO, "%s: bytes_per_line: %d, bits_per_pixel: %d\n "
+			"               x_res x y_res: %d x %d, size: %d\n",
+			 __func__, edid.bytes_per_line,
+			edid.framebuffer_bits_per_pixel,
+			edid.x_resolution, edid.y_resolution,
+			(edid.bytes_per_line * edid.y_resolution));
+
+	set_vbe_mode_info_valid(&edid, 0);
+
+	/*
+	 * After this point, it is payload's responsibility to allocate
+	 * framebuffer and sets the base address to dc's
+	 * WINBUF_START_ADDR register and enables window by setting dc's
+	 * DISP_DISP_WIN_OPTIONS register.
+	 */
 }
 



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