[coreboot-gerrit] New patch to review for coreboot: 2b702f6 cpu/x86/lapic/lapic_cpu_init.c: Skip 10 ms delay for Intel Nehalem CPUs
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Sat Jun 15 11:39:46 CEST 2013
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3469
-gerrit
commit 2b702f6a6124be020b0b57ac448c68a80adfbe0d
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date: Fri Jun 14 02:33:03 2013 +0200
cpu/x86/lapic/lapic_cpu_init.c: Skip 10 ms delay for Intel Nehalem CPUs
Intel Nehalem (2065x) processors do not need the 10 ms delay before
deasserting init. So skip it.
The same was done for Sandy Bridge processors (206Ax) in commit »Fixes
and Sandybridge support for lapic cpu init« (2bdfb48b) [1].
This commit is split out from »Three hunks which were missing on original
2065x commit« [2] and was tested on the laptop Lenovo ThinkPad X201.
[1] http://review.coreboot.org/871
[2] http://review.coreboot.org/3455
Change-Id: I69365eb22940e13977034030c5142a390c011a53
Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/cpu/x86/lapic/lapic_cpu_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index fbc8aa4..7f18c7c 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -141,7 +141,7 @@ static int lapic_start_cpu(unsigned long apicid)
}
return 0;
}
-#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_INTEL_MODEL_206AX
+#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_INTEL_MODEL_206AX && !CONFIG_CPU_INTEL_MODEL_2065X
mdelay(10);
#endif
More information about the coreboot-gerrit
mailing list