[coreboot-gerrit] New patch to review for coreboot: 8a23116 cpu/x86/lapic/lapic_cpu_init.c: Skip 10 ms delay for AMD AGESA processors
Paul Menzel (paulepanter@users.sourceforge.net)
gerrit at coreboot.org
Sat Jun 15 11:39:47 CEST 2013
Paul Menzel (paulepanter at users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3470
-gerrit
commit 8a2311629391413e56c5bd05d1991b06b6e7432b
Author: Paul Menzel <paulepanter at users.sourceforge.net>
Date: Fri Jun 14 23:42:45 2013 +0200
cpu/x86/lapic/lapic_cpu_init.c: Skip 10 ms delay for AMD AGESA processors
The following commit tried to do skip the 10 ms delay but used the
non-existing Kconfig define `CONFIG_CPU_AMD_MODEL_14XXX`.
commit 236aef238f6e5c735cc9f253746def582fbaf8ff
Author: Scott Duplichan <scott at notabs.org>
Date: Tue Oct 19 04:36:42 2010 +0000
To reduce boot time, remove the double startup IPI and 10 ms delay from lapic_cpu_init.c. The change is
currently restricted to recent model AMD processors, though it could be applied to others after successful testing.
This was the reason for it being removed – and unfortunately not
fixed – in the following commit.
commit 2bdfb48b13ab5c392ef2b1dd9a8bfda6c90b2e18
Author: Stefan Reinauer <reinauer at chromium.org>
Date: Tue Apr 3 16:17:11 2012 -0700
Fixes and Sandybridge support for lapic cpu init
Reviewed-on: http://review.coreboot.org/871
So try it again, by using `CPU_AMD_AGESA` as all AMD processors
using AGESA – currently Family 10h to 15h – should not need the delay.
Successfully tested on ASRock E350M1 with a Family 14h processor.
• coreboot serial log without the patch
01.015: Asserting INIT.
01.017: Waiting for send to finish...
01.017: +Deasserting INIT.
• coreboot serial log with the patch
00.992: Asserting INIT.
00.992: Waiting for send to finish...
00.993: +Deasserting INIT.
Change-Id: I16060555e18910a803749be730dd902648d09de7
Signed-off-by: Paul Menzel <paulepanter at users.sourceforge.net>
---
src/cpu/x86/lapic/lapic_cpu_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index 7f18c7c..80a40cc 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -141,7 +141,7 @@ static int lapic_start_cpu(unsigned long apicid)
}
return 0;
}
-#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_INTEL_MODEL_206AX && !CONFIG_CPU_INTEL_MODEL_2065X
+#if !CONFIG_CPU_AMD_MODEL_10XXX && !CONFIG_CPU_AMD_AGESA && !CONFIG_CPU_INTEL_MODEL_206AX && !CONFIG_CPU_INTEL_MODEL_2065X
mdelay(10);
#endif
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