coreboot-announce

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23 discussions

Is there anything I can do to make coreboot better?
by shawn Bai 18 May '11

18 May '11

Hello, guys, I am very pleased to have the chance to talk with you. I hope I do not bother you. My name is Shawn Bai, and you can call me Shawn, it's OK. I am very interested both in the low-level in embedded system, and in BIOS level in desktop computer or server. I get to know this open source project while I browse the internet. I think it's a very good project to help me understand what happens within the system, even more. Is there anything I can do to make coreboot better? I have some work experience in embedded system low-level development, mainly in Board support package. Hope to hear from you soon. Best Regards, Shawn Bai

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coreboot GSoC 2011
by Marc Jones 18 Mar '11

18 Mar '11

I'm happy to announce that coreboot has been accepted to participate in GSoC 2011. Please forward this information to all prospective GSoC student participants. Note, the coreboot project acts as an umbrella for coreboot related projects like flashrom and other payloads. http://www.google-melange.com/gsoc/org/show/google/gsoc2011/coreboot Prospective students and mentors should visit the coreboot wiki for complete information. http://www.coreboot.org/GSoC Please feel free to update the wiki or email the coreboot list if you have additional project ideas or other comments. Regards, Marc -- http://se-eng.com

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AMD blogs about coreboot
by Marc Jones 28 Feb '11

28 Feb '11

2011/2/28 AMD blogs about coreboot [1] AMD posts two blog entries about coreboot and Open Source. One, written by coreboot developer Marc Jones, covers the recent coreboot contribution for AMD Embedded G-Series platforms [2]. The other, by Kevin Tanguay, discusses AMD's embedded strategy around coreboot and open source [3]. [1] http://www.coreboot.org/News#2011.2F2.2F28_AMD_blogs_about_coreboot [2] http://blogs.amd.com/work/2011/02/28/technical-details-coreboot/ [3] http://blogs.amd.com/work/2011/02/28/amd-coreboot/ -- http://se-eng.com

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[ANN]Read-only git mirror of the coreboot repository
by Patrick Georgi 30 Jan '11

30 Jan '11

Hi, given the large interest in using git by members of the community, I worked on an official read-only git mirror for general use. It has a website with code browser at http://code.coreboot.org/p/coreboot-git/ and the repo URL is git://code.coreboot.org/coreboot-git.git It's automatically updated by a post-commit hook in the SVN repository. Compared to the SVN upstream, it contains the full history (though not all seems to be reachable, eg. the "coreboot-v1" branch), which I cleaned up a bit to avoid confusing git-svn with our repository restructurings we did over the years. Since revision 4900 it's completely in sync with upstream, so most users shouldn't notice. Patrick

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Welcome coreboot developer blogs
by Stefan Reinauer 24 May '10

24 May '10

Hi, last week we started a coreboot developer blog: http://blogs.coreboot.org/ This is starting out as the place where you can read about news from our five GSoC students, and I think they are doing great already. Go check it out! But the blog is not required to be a GSoC only thing. If you're a coreboot developer and want to post your coreboot related news to this blog, please contact me for an account. Hope you enjoy this. Best regards, Stefan -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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Getac P470 notebook support
by Stefan Reinauer 14 May '10

14 May '10

Hi, coreboot® is running on a multitude of different computers, ranging from tiny embedded systems as small as the palm of your hand over desktop and server systems to super computers with thousands of nodes. And now this is the second i945 based notebook that can run coreboot. Thus, I am especially glad to announce that coresystems GmbH is releasing coreboot® for the Getac P470 notebook today. It's a semi-rugged notebook, protected against shock, featuring a fingerprint reader and a sunlight readable display: http://en.getac.com/products/P470/P470_overview.html We have been testing various Linux distributions as well as Windows 7 booting on this nice notebook. I want to sincerely thank those who made this project possible with their funding: - secunet Security Networks AG - Bundesamt für Sicherheit in der Informationstechnologie (Federal Office for Information Security, BSI) A big thank you also goes to everyone who worked with coresystems on this project. Best regards, Stefan Reinauer -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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[ANNOUNCE] Roda RK886EX (Rocky III+) notebook support
by Stefan Reinauer 16 Jan '10

16 Jan '10

Ladies and Gentlemen, coreboot® is running on a multitude of different computers, ranging from tiny embedded systems as small as the palm of your hand over desktop and server systems to super computers with thousands of nodes. However, one might say that in the area of mobile computers coreboot has to catch up, compared to its support of other devices. Thus, I am especially glad to announce that coresystems GmbH is releasing coreboot® for the Roda RK886EX a.k.a Rocky III+ notebook today. It's a rugged notebook, protected against shock, vibration, dust and humidity: http://www.roda-computer.com/en/products/notebooks/rocky-iii-rk886ex.html We have been testing various Linux distributions as well as Windows XP and Windows 7 booting on this nice notebook. I want to sincerely thank those who made this project possible with their funding: - secunet Security Networks AG - Bundesamt für Sicherheit in der Informationstechnologie (Federal Office for Information Security, BSI) A big thank you also goes to everyone who worked with coresystems on this project. Best regards, Stefan Reinauer -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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SerialICE 1.5 released - Qemu based firmware debugger
by Stefan Reinauer 21 Nov '09

21 Nov '09

Dear x86/x64 hardware and low-level software developers and enthusiasts! coresystems GmbH is glad to release SerialICE 1.5: SerialICE (http://www.serialice.com) is a BIOS/Firmware debugging tool. It allows you to run and observe BIOS images (such as coreboot®: http://www.coreboot.org/) written for real hardware in Qemu (http://www.qemu.org) for debugging purposes. Thanks to Qemu's compelling feature set, it's also possible to debug this BIOS code with GNU GDB. Among the new features of SerialICE version 1.5: - Rework memory and IO filters to provide more control - Improved PCI, PCIe and memory access logging - Windows (MINGW and Cygwin) support - New mainboard supported: ASUS P2B - SerialICE connection now survives target resets - CPUID now honors ECX values - RDMSR/WRMSR now honor EDI unlock keys - Add LUA patch to correctly operate on 32bit hosts - Drop SerialICE specific machine type in Qemu SerialICE consists of three parts: - a serial console "rom shell" compiled with romcc, with minimal footprint. - a patch to Qemu 0.11.0, which adds a new "SerialICE" machine. - a LUA script that contains filters, loggers and other SerialICE specific configuration and adaption. SerialICE can be downloaded from http://www.serialice.com/. With "qemu -serialice /dev/ttyS0 -L path-to-your-bios.bin-dir -hda /dev/zero" you can run an arbitrary BIOS binary written for your target hardware in Qemu, thus logging all IO and memory accesses. Those operations will additionally be transmitted to the target system's shell and are executed there, while their results are submitted back to Qemu. Operations sent to the target: - memory reads/writes (some of them) - IO reads/writes - MSR reads/writes - CPUID calls (the bios code path might rely on this) Note: The code is still quite experimental and only supports a few number of mainboard out of the box, but it was already useful in some debugging scenarios we had and was able to reveil information that would normally only be available with a hardware debugger of the price of a new car. Don't expect SerialICE to completely replace a ICE/JTAG/ITP device, but it might just work for your case, as it did for us. The ROM code needs minimal board/chipset specific setup in order to establish serial communication with Qemu. See mainboard/* for a few examples. This release contains setup code for 7 mainboards. Also, some hardware accesses have to be caught in the LUA code (scripts/serialice.lua) in order to prevent the system from locking up (ie. when the BIOS is disabling the serial console). Special thanks go to Patrick Georgi and Mark Marshall for their bug fixes and contributions to this release. See http://www.serialice.com/ for more information. Comments and patches are of course very welcome! Best regards, Stefan Reinauer -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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SerialICE - Qemu based x86 firmware debugger
by Stefan Reinauer 29 Oct '09

29 Oct '09

Dear x86 hardware and low-level software developers and enthusiasts! coresystems GmbH is glad to release a new version of our "Integrated Circuit Emulator over Serial", short SerialICE. Short description: SerialICE (http://www.serialice.com) is a BIOS/Firmware debugging tool. It allows you to run and observe BIOS images (such as coreboot®: http://www.coreboot.org/) written for real hardware in Qemu (http://www.qemu.org) for debugging purposes. Thanks to Qemu's compelling feature set, it's also possible to debug this BIOS code with GNU GDB. SerialICE consists of three parts: - a serial console "rom shell" compiled with romcc, with minimal footprint. - a patch to Qemu 0.11.0, which adds a new "SerialICE" machine. - a LUA script that contains filters, loggers and other SerialICE specific configuration and adaption SerialICE can be downloaded from http://www.serialice.com/. With "qemu -m serialice -serialice /dev/ttyS0 -L path-to-your-bios.bin-dir -hda /dev/zero" you can run an arbitrary BIOS binary written for your target hardware in Qemu, thus logging all IO and memory accesses. Those operations will additionally be transmitted to the target system's shell and are executed there, while their results are submitted back to Qemu. Operations sent to the target: - memory reads/writes (some of them) - IO reads/writes - MSR reads/writes - CPUID calls (the bios code path might rely on this) Note: The code is still quite experimental and only supports a few number of mainboard out of the box, but it was already useful in some debugging scenarios we had and was able to reveil information that would normally only be available with a hardware debugger of the price of a new car. Don't expect SerialICE to completely replace a ICE/JTAG/ITP device, but it might just work for your case, as it did for us. The ROM code needs minimal board/chipset specific setup in order to establish serial communication with Qemu. See mainboard/* for a few examples. This release contains setup code for 7 mainboards. Also, some hardware accesses have to be caught in the LUA code (scripts/serialice.lua) in order to prevent the system from locking up (ie. when the BIOS is disabling the serial console). Among the new features: - Completely scriptable filtering and logging with LUA and bitlib. - Kconfig/Kbuild support (make menuconfig) - New mainboards supported: Intel D945GCLF, ASUS M2V-MX SE, MSI MS6178, Thomson IP1000, Dell PowerEdge s1850, RCA RM4100 - Patch against latest Qemu version 0.11.0. - Support for compiling with XMMSTACK and ROMCC. - Many bugs fixed: serial communication, data corruption by signed/unsigned casts, ... Known issues: - microcode updates from within emulated ROM code will fail. - some rarely used calls of cpuid and rdmsr/wrmsr might not give the correct information Special thanks go to Daniel Liu, Rudolf Marek, Ron Minnich, Joe Smith, Uwe Hermann and Mark Marshall for their bug fixes and contributions to this release. See http://www.serialice.com/ for more information. Comments and patches are of course very welcome! Best regards, Stefan Reinauer -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/ Registergericht: Amtsgericht Freiburg • HRB 7656 Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866

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AMD RS780 docs released, coreboot support coming
by Carl-Daniel Hailfinger 08 Aug '09

08 Aug '09

The coreboot community, which includes government organizations, corporations, research labs and individuals from around the world, is very excited to expand on our existing and decade-long collaboration with AMD. This collaboration has, over the years, resulted in the inclusion of coreboot into everything from some of the largest AMD-based supercomputers in the world to some of the smallest embedded systems. Together with the recent SB700/SB710/SB750 documentation release, the Developer Guide release for the RS780 family of Integrated Chipset/ Graphics Processors enables the coreboot community to support any board with AMD chipsets out there, from embedded to enthusiast desktop and high-end server boards. This new release once again demonstrates AMD's commitment to open standards and software that provides an improved user experience and Total Cost of Ownership for users in every walk of life. One cornerstone of this openness is the availability of documentation without NDA, enabling everyone to contribute. Coreboot is a BIOS/EFI alternative with optional BIOS/EFI backwards compatibility. Not only does coreboot enable extremely fast booting with well under one second spent inside coreboot, and total four second boot time from poweron to a working desktop, it also has superior reliability and realtime performance. Coreboot developers have embedded various operating systems, among them Linux and Plan 9, directly into onboard ROM chips yielding systems without moving parts and built-in network manageability. Virtualization is made easier by optionally embedding the KVM hypervisor into the ROM as well. Military strength encryption and access protection add-ons exist for environments where security is key. Its extended diagnostics in plain English are second to none. Of course, coreboot supports Windows XP/Vista/7 as well as Linux, *BSD and Plan 9. Coreboot is open source, so every interested developer or user can modify, tweak and extend it to their heart's content. An additional benefit of this documentation release is flashrom support for all AMD chipsets which enables users to reflash their BIOS/firmware/coreboot from within Linux and *BSD without rebooting. Coreboot code for the SB700 and 780 chipset family is already being worked on by Zheng Bao at AMD in his spare time and the coreboot community is happy to work with him on finishing and integrating the code into the official coreboot codebase. We'd like to thank Sharon Troia at AMD for making these documentation releases possible. The developer guides are available at http://developer.amd.com/documentation/guides/Pages/default.aspx#chipset More information about coreboot is available at http://www.coreboot.org/

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