[SeaBIOS] Librem 15v3 hangs at Booting from Hard Disk...
pmenzel at molgen.mpg.de
Tue May 15 11:30:52 CEST 2018
First of all, please respect the netiquette and do not top post. It
makes replying much harder. Please use the interleaved style in the future.
On 05/15/18 04:09, Philip C. wrote:
> On Wed, May 9, 2018 at 9:14 PM Philip C. <pchampon at gmail.com> wrote:
> But, now no matter what I do, unattended boots hang on
> SeaBIOS (version rel-1.11.0-0-g63451fc)
> Booting from Hard Disk...
Second, I really think this not a SeaBIOS issue, but a hard drive issue.
But it seems functional, as SeaBIOS is listing it in the boot menu, and
you can access it from the live installation.
> I managed to get some feedback from Kevin, on IRC, which was set debug to
> I began the adventure, by taking advantage of a pureos script
> I had to make a few modifications
> megadl '
> mv Intel\ CSME\ 11.0\ Firmware\ Repository\ Pack\ r50.rar
> comment out lines 226 and 227
> cd coreboot/flashrom && CFLAGS="-Wno-error=deprecated-declarations"
> make; cd -
> update the librem15v3 coreboot config file, setting seabios debug from
> -1 to 8
> comment out the attempt to check the sha256 of the coreboot (since
> debug changes sha)
> the script created a coreboot rom file and claimed that it flashed the
> However, when I rebooted, I didn't see any extra output on the screen and
> it is still hung on the Booting from Hard disk... message
> Any thoughts on how I can get the debug output?
1. You need to capture the coreboot and SeaBIOS messages. Does the
device have ports which can be used for debugging? As it’s a laptop,
that is probably not the case.
You could see if the messages are preserved during reboot. So, plug in
the device with the live distribution, try to boot from the drive, get
the error, and (warm) reboot, and select the distribution. Build
`cbmem`, by getting the coreboot source code , and then do `make -C
util/cbmem`. Or start a Linux kernel with
`CONFIG_GOOGLE_MEMCONSOLE_COREBOOT` and look into `/sys/firmware/log`.
2. See if the option *SPI Flash console output*
(`CONFIG_CONSOLE_SPI_FLASH`) is supported on your board. The Puri.sm
folks should know and help you with that.
> Send coreboot debug output to the SPI Flash in the FMAP CONSOLE area
> This option can cause premature wear on the SPI flash and should not
> be used as a normal means of debugging. It is only to be enabled and
> used when porting a new motherboard which has no other console
> available (no UART, no POST, no cbmem access(non bootable)). Since
> a non bootable machine will require the use of an external SPI Flash
> programmer, the developer can grab the console log at the same time.
> The flash console will not be erased on reboot, so once it is full,
> the flashconsole driver will stop writing to it. This is to avoid
> wear on the flash, and to avoid erasing sectors (which may freeze
> the SPI controller on skylake).
> The 'CONSOLE' area can be extracted from the FMAP with :
> cbfstool rom.bin read -r CONSOLE -f console.log
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