[SeaBIOS] [PATCH] shadow: set code segment to high rom region when enabling RAM
kevin at koconnor.net
Thu Dec 13 17:42:54 CET 2018
On Wed, Dec 12, 2018 at 04:45:08PM +0300, Evgeny Yakovlev wrote:
> Currently make_bios_writable_intel will call __make_bios_writeable_intel
> from high rom memory by manually correcting its offset to make sure that
> we safely execute it while overriding memory mapping through PAMs
> However we still may call code from low memory, when
> __make_bios_writeable_intel itself calls other code without manual
> pointer adjustments. Right now it calls pci_config_readl and
> Consider this scenario:
> 0. Linker puts pci_config_writel in F-segment.
> 1. first pci_config_writel is called to reprogram PAM0-3, which means
> remap regions 0xF0000-0xFFFFF and 0xD0000 - 0xC7FFF.
> 2. second pci_config_writel is called to reprogram PAM4-7 but code in
> F-segment is no longer valid, including pci_config_writel.
The x86 instruction set uses relative function calls by default. So,
a call to pci_config_writel() calls the copy of that function also
located in 0xFFF00000.
Are you seeing an error in practice? It's known that
__make_bios_writeable_intel() is an ugly hack - it's there because
qemu doesn't support "write back" mode of the pam registers. So the
code needs to run at a different location when making that area
writable. It is specific to qemu, so we only need it to run okay on
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