[SeaBIOS] A20: ahci_process_op is called with A20 off
kevin at koconnor.net
Fri May 12 18:40:31 CEST 2017
On Fri, May 12, 2017 at 06:29:19PM +0200, Paolo Bonzini wrote:
> On 12/05/2017 18:26, Kevin O'Connor wrote:
> > On Thu, May 11, 2017 at 11:22:02PM +0000, Xu, Anthony wrote:
> >>> SeaBIOS has a couple of different methods to accomplish this mode
> >>> switching - it can directly switch modes (C16_BIG switch) or it can
> >>> use a helper in SMM mode to perform the switch (C16_SMM). The
> >>> preferred method is C16_SMM as C16_BIG isn't available in VM86 mode
> >>> and it also clobbers the 16bit segment registers.
> >> Hi Kevin,
> >> Why does SeaBios use VM86 mode?
> > As Paolo mentioned, SeaBIOS doesn't use it, but it must support
> > callers that use it.
> >> vtx supports real mode long time ago.
> >> C16_SMM is slow because it causes several extra switches between VM and QEMU.
> >> I would prefer C16_BIG for better performance.
> >> Does SeaBios know if it runs in real mode or VM86 mode?
> >> Can SeaBios choose C16_SMM/C16_BIG based on VCPU mode?
> > Yes, SeaBIOS could use the smsw instruction (see x86.h:cr0_vm86_read)
> > to check if it is in VM86 mode. Using C16_BIG would still clobber the
> > segment registers, but it might be worth that risk to avoid the extra
> > overhead of C16_SMM.
> I don't think the SMM overhead is that bad (is SMM only used on QEMU?).
Yes, the SMM code in SeaBIOS is currently exclusive to QEMU. I
considered adding an equivalent SMI handler to coreboot, but it seems
it's not really needed. Only ancient OSes require it and that's not a
typical mix with coreboot. (And if one needs to run an ancient OS
then they would almost certainly be better off running it in an
> At least for KVM it's not bad, maybe 4000 clock cycles roundtrip
> (SeaBIOS does two such trips).
> For TCG I have a patch to reduce it substantially but I haven't had time
> to send it yet.
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