[SeaBIOS] [RFC PATCH v2 6/6] hw/pci: add hint capabilty for additional bus reservation to pcie-root-port

[Marcel Apfelbaum]

On 25/07/2017 0:43, Alexander Bezzubikov wrote:
> 2017-07-24 23:43 GMT+03:00 Michael S. Tsirkin <mst at redhat.com>:
>> On Sun, Jul 23, 2017 at 01:15:43AM +0300, Aleksandr Bezzubikov wrote:
>>> Signed-off-by: Aleksandr Bezzubikov <zuban32s at gmail.com>
>>> ---
>>>   hw/pci-bridge/pcie_root_port.c | 5 +++++
>>>   1 file changed, 5 insertions(+)
>>>
>>> diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
>>> index b0e49e1..ca92d85 100644
>>> --- a/hw/pci-bridge/pcie_root_port.c
>>> +++ b/hw/pci-bridge/pcie_root_port.c
>>> @@ -106,6 +106,11 @@ static void rp_realize(PCIDevice *d, Error **errp)
>>>       pcie_aer_root_init(d);
>>>       rp_aer_vector_update(d);
>>>
>>> +    rc = pci_bridge_help_cap_init(d, 0, p->bus_reserve, 0, 0, 0, errp);
>>> +    if (rc < 0) {
>>> +        goto err;
>>> +    }
>>> +
>>>       return;
>>>
>>>   err:
>>
>> It looks like this will add the capability unconditionally to all
>> pcie root ports. Two issues with it:
>> 1. you can't add vendor properties to devices where vendor is
>>     not qemu as they might have their own concept of what it does.
>> 2. this will break compatibility with old machine types,
>>     need to disable for these
>>
> 
> Actually the original idea was to add it for pcie-root-port excusively
> (for now at least), looks like I've confused a little with files naming.

Right, for the Generic PCIe Root Port and not for all the root ports.
In the future we may want to add it to the PCI-brigde so we can have
nested bridges, but we are not there yet.

> Will add it for v3.
> 

Thanks,
Marcel

>>> --
>>> 2.7.4
> 
> 
>