[SeaBIOS] [PATCH v5 0/4] Generic PCIE-PCI Bridge
zuban32s at gmail.com
Fri Aug 11 01:30:59 CEST 2017
This series introduces a new device - Generic PCI Express to PCI bridge,
and also makes all necessary changes to enable hotplug of the bridge itself
and any device into the bridge.
1. Change PCIE-PCI Bridge license (addresses Marcel's comment)
2. The capability layout changes (adress Laszlo' comments):
- separate pref_mem into pref_mem_32 and pref_mem_64 fields (SeaBIOS side has the same changes)
- accordingly change the Generic Root Port's properties
3. Do not add the capability to the root port if no valid values are provided (adresses Michael's comment)
4. Rename the capability type to 'RESOURCE_RESERVE' (addresses Marcel's comment)
5. Remove shpc_present check function (addresses Marcel's comment)
6. Fix the 4th patch message (adresses Michael's comment)
7. Patch for SHPC enabling in _OSC method has been already merged
1. PCIE-PCI Bridge device: "msi_enable"->"msi", "shpc"->"shpc_bar", remove local_err,
make "msi" property OnOffAuto, shpc_present() is still here
to avoid SHPC_VMSTATE refactoring (address Marcel's comments).
2. Change QEMU PCI capability layout (SeaBIOS side has the same changes):
- change reservation fields types: bus_res - uint32_t, others - uint64_t
- rename 'non_pref' and 'pref' fields
- interpret -1 value as 'ignore'
3. Use parent_realize in Generic PCI Express Root Port properly.
4. Fix documentation: fully replace the DMI-PCI bridge references with the new PCIE-PCI bridge,
"PCIE"->"PCI Express", small mistakes and typos - address Laszlo's and Marcel's comments.
5. Rename QEMU PCI cap creation fucntion - addresses Marcel's comment.
(0). 'do_not_use' capability field flag is still _not_ in here since we haven't come to consesus on it yet.
1. Merge commits 5 (bus_reserve property creation) and 6 (property usage) together - addresses Michael's comment.
2. Add 'bus_reserve' property and QEMU PCI capability only to Generic PCIE Root Port - addresses Michael's and Marcel's comments.
3. Change 'bus_reserve' property's default value to 0 - addresses Michael's comment.
4. Rename QEMU bridge-specific PCI capability creation function - addresses Michael's comment.
5. Init the whole QEMU PCI capability with zeroes - addresses Michael's and Laszlo's comments.
6. Change QEMU PCI capability layout (SeaBIOS side has the same changes)
- add 'type' field to distinguish multiple
RedHat-specific capabilities - addresses Michael's comment
- do not mimiс PCI Config space register layout, but use mutually exclusive differently
sized fields for IO and prefetchable memory limits - addresses Laszlo's comment
7. Correct error handling in PCIE-PCI bridge realize function.
8. Replace a '2' constant with PCI_CAP_FLAGS in the capability creation function - addresses Michael's comment.
9. Remove a comment on _OSC which isn't correct anymore - address Marcel's comment.
10. Add documentation for the Generic PCIE-PCI Bridge and QEMU PCI capability - addresses Michael's comment.
1. Enable SHPC for the bridge.
2. Enable SHPC support for the Q35 machine (ACPI stuff).
3. Introduce PCI capability to help firmware on the system init.
This allows the bridge to be hotpluggable. Now it's supported
only for pcie-root-port. Now it's supposed to used with
SeaBIOS only, look at the SeaBIOS corresponding series
"Allow RedHat PCI bridges reserve more buses than necessary during init".
Aleksandr Bezzubikov (4):
hw/pci: introduce pcie-pci-bridge device
hw/pci: introduce bridge-only vendor-specific capability to provide
some hints to firmware
hw/pci: add QEMU-specific PCI capability to the Generic PCI Express
docs: update documentation considering PCIE-PCI bridge
docs/pcie.txt | 49 +++++-----
docs/pcie_pci_bridge.txt | 115 ++++++++++++++++++++++
hw/pci-bridge/Makefile.objs | 2 +-
hw/pci-bridge/gen_pcie_root_port.c | 36 +++++++
hw/pci-bridge/pcie_pci_bridge.c | 192 +++++++++++++++++++++++++++++++++++++
hw/pci/pci_bridge.c | 54 +++++++++++
include/hw/pci/pci.h | 1 +
include/hw/pci/pci_bridge.h | 24 +++++
include/hw/pci/pcie_port.h | 1 +
9 files changed, 450 insertions(+), 24 deletions(-)
create mode 100644 docs/pcie_pci_bridge.txt
create mode 100644 hw/pci-bridge/pcie_pci_bridge.c
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