[SeaBIOS] [PATCH v4 3/5] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware
Marcel Apfelbaum
marcel at redhat.com
Mon Aug 7 18:44:53 CEST 2017
On 05/08/2017 23:27, Aleksandr Bezzubikov wrote:
> On PCI init PCI bridges may need some extra info about bus number,
> IO, memory and prefetchable memory to reserve. QEMU can provide this
> with a special vendor-specific PCI capability.
>
Hi Aleksandr,
> Signed-off-by: Aleksandr Bezzubikov <zuban32s at gmail.com>
> ---
> hw/pci/pci_bridge.c | 29 +++++++++++++++++++++++++++++
> include/hw/pci/pci_bridge.h | 21 +++++++++++++++++++++
> 2 files changed, 50 insertions(+)
>
> diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
> index 720119b..889950d 100644
> --- a/hw/pci/pci_bridge.c
> +++ b/hw/pci/pci_bridge.c
> @@ -408,6 +408,35 @@ void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
> br->bus_name = bus_name;
> }
>
> +
> +int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
> + uint32_t bus_reserve, uint64_t io_reserve,
> + uint64_t non_pref_mem_reserve,
> + uint64_t pref_mem_reserve,
> + Error **errp)
> +{
> + size_t cap_len = sizeof(PCIBridgeQemuCap);
> + PCIBridgeQemuCap cap = {
> + .len = cap_len,
> + .type = REDHAT_PCI_CAP_QEMU_RESERVE,
I would change the type to:
REDHAT_PCI_CAP_RESOURCE_RESERVE
QEMU is less important here (I think) than "resource".
> + .bus_res = bus_reserve,
> + .io = io_reserve,
> + .mem = non_pref_mem_reserve,
> + .mem_pref = pref_mem_reserve
> + };
> +
> + int offset = pci_add_capability(dev, PCI_CAP_ID_VNDR,
> + cap_offset, cap_len, errp);
> + if (offset < 0) {
> + return offset;
> + }
> +
> + memcpy(dev->config + offset + PCI_CAP_FLAGS,
> + (char *)&cap + PCI_CAP_FLAGS,
> + cap_len - PCI_CAP_FLAGS);
> + return 0;
> +}
> +
> static const TypeInfo pci_bridge_type_info = {
> .name = TYPE_PCI_BRIDGE,
> .parent = TYPE_PCI_DEVICE,
> diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
> index ff7cbaa..be565f7 100644
> --- a/include/hw/pci/pci_bridge.h
> +++ b/include/hw/pci/pci_bridge.h
> @@ -67,4 +67,25 @@ void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
> #define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400 /* Discard timer status */
> #define PCI_BRIDGE_CTL_DISCARD_SERR 0x800 /* Discard timer SERR# enable */
>
> +typedef struct PCIBridgeQemuCap {
> + uint8_t id; /* Standard PCI capability header field */
> + uint8_t next; /* Standard PCI capability header field */
> + uint8_t len; /* Standard PCI vendor-specific capability header field */
> + uint8_t type; /* Red Hat vendor-specific capability type.
> + Types are defined with REDHAT_PCI_CAP_ prefix */
> +
> + uint32_t bus_res; /* Minimum number of buses to reserve */
> + uint64_t io; /* IO space to reserve */
> + uint64_t mem; /* Non-prefetchable memory to reserve */
> + uint64_t mem_pref; /* Prefetchable memory to reserve */
> +} PCIBridgeQemuCap;
> +
> +#define REDHAT_PCI_CAP_QEMU_RESERVE 1
> +
> +int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
> + uint32_t bus_reserve, uint64_t io_reserve,
> + uint64_t non_pref_mem_reserve,
> + uint64_t pref_mem_reserve,
> + Error **errp);
> +
> #endif /* QEMU_PCI_BRIDGE_H */
>
With the name change, the layout looks good to me:
Reviewed-by: Marcel Apfelbaum <marcel at redhat.com>
Thanks,
Marcel
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