[SeaBIOS] [Qemu-devel] [PATCH v3 5/5] docs: update documentation considering PCIE-PCI bridge

[Marcel Apfelbaum]

On 02/08/2017 1:23, Laszlo Ersek wrote:
> On 08/01/17 23:39, Michael S. Tsirkin wrote:
>> On Wed, Aug 02, 2017 at 12:33:12AM +0300, Alexander Bezzubikov wrote:
>>> 2017-08-01 23:31 GMT+03:00 Laszlo Ersek <lersek at redhat.com>:
>>>> (Whenever my comments conflict with Michael's or Marcel's, I defer to them.)
>>>>
>>>> On 07/29/17 01:37, Aleksandr Bezzubikov wrote:
>>>>> Signed-off-by: Aleksandr Bezzubikov <zuban32s at gmail.com>
>>>>> ---
>>>>>   docs/pcie.txt            |  46 ++++++++++--------
>>>>>   docs/pcie_pci_bridge.txt | 121 +++++++++++++++++++++++++++++++++++++++++++++++
>>>>>   2 files changed, 147 insertions(+), 20 deletions(-)
>>>>>   create mode 100644 docs/pcie_pci_bridge.txt
>>>>>
>>>>> diff --git a/docs/pcie.txt b/docs/pcie.txt
>>>>> index 5bada24..338b50e 100644
>>>>> --- a/docs/pcie.txt
>>>>> +++ b/docs/pcie.txt
>>>>> @@ -46,7 +46,7 @@ Place only the following kinds of devices directly on the Root Complex:
>>>>>       (2) PCI Express Root Ports (ioh3420), for starting exclusively PCI Express
>>>>>           hierarchies.
>>>>>
>>>>> -    (3) DMI-PCI Bridges (i82801b11-bridge), for starting legacy PCI
>>>>> +    (3) PCIE-PCI Bridge (pcie-pci-bridge), for starting legacy PCI
>>>>>           hierarchies.
>>>>>
>>>>>       (4) Extra Root Complexes (pxb-pcie), if multiple PCI Express Root Buses
>>>>
>>>> When reviewing previous patches modifying / adding this file, I
>>>> requested that we spell out "PCI Express" every single time. I'd like to
>>>> see the same in this patch, if possible.
>>>
>>> OK, I didn't know it.
>>>
>>>>
>>>>> @@ -55,18 +55,18 @@ Place only the following kinds of devices directly on the Root Complex:
>>>>>      pcie.0 bus
>>>>>      ----------------------------------------------------------------------------
>>>>>           |                |                    |                  |
>>>>> -   -----------   ------------------   ------------------   --------------
>>>>> -   | PCI Dev |   | PCIe Root Port |   | DMI-PCI Bridge |   |  pxb-pcie  |
>>>>> -   -----------   ------------------   ------------------   --------------
>>>>> +   -----------   ------------------   -------------------   --------------
>>>>> +   | PCI Dev |   | PCIe Root Port |   | PCIE-PCI Bridge |   |  pxb-pcie  |
>>>>> +   -----------   ------------------   -------------------   --------------
>>>>>
>>>>>   2.1.1 To plug a device into pcie.0 as a Root Complex Integrated Endpoint use:
>>>>>             -device <dev>[,bus=pcie.0]
>>>>>   2.1.2 To expose a new PCI Express Root Bus use:
>>>>>             -device pxb-pcie,id=pcie.1,bus_nr=x[,numa_node=y][,addr=z]
>>>>> -      Only PCI Express Root Ports and DMI-PCI bridges can be connected
>>>>> +      Only PCI Express Root Ports, PCIE-PCI bridges and DMI-PCI bridges can be connected
>>>>
>>>> It would be nice if we could keep the flowing text wrapped to 80 chars.
>>>>
>>>> Also, here you add the "PCI Express-PCI" bridge to the list of allowed
>>>> controllers (and you keep DMI-PCI as permitted), but above DMI was
>>>> replaced. I think these should be made consistent -- we should make up
>>>> our minds if we continue to recommend the DMI-PCI bridge or not. If not,
>>>> then we should eradicate all traces of it. If we want to keep it at
>>>> least for compatibility, then it should remain as fully documented as it
>>>> is now.
>>>
>>> Now I'm beginning to think that we shouldn't keep the DMI-PCI bridge
>>> even for compatibility and may want to use a new PCIE-PCI bridge
>>> everywhere (of course, except some cases when users are
>>> sure they need exactly DMI-PCI bridge for some reason)
>>
>> Can dmi-pci support shpc? why doesn't it? For compatibility?
> 
Yes, mainly because I as far as I know the Intel device hasn't
an SHPC controller. Is may be possible to make it work
with it, but now we don't have a reason since we have PCIe_PCI bridge.

> I don't know why, but the fact that it doesn't is the reason libvirt
> settled on auto-creating a dmi-pci bridge and a pci-pci bridge under
> that for Q35. 

And hotplug doesn't work even for this configuration!
(last time I checked)

Thanks,
Marcel

The reasoning was (IIRC Laine's words correctly) that the
> dmi-pci bridge cannot receive hotplugged devices, while the pci-pci
> bridge cannot be connected to the root complex. So both were needed.
> 
> Thanks
> Laszlo
>