[SeaBIOS] [PATCH] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL
Haozhong Zhang
haozhong.zhang at intel.com
Thu Jun 16 13:49:24 CEST 2016
OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL
for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file
"etc/msr_feature_control" to advise bits that should be set in
MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the
advised bits in that MSR.
Signed-off-by: Haozhong Zhang <haozhong.zhang at intel.com>
---
QEMU patch added fw_cfg file etc/msr_feature_control can be found
at [1]. Note I mistakenly used u32 as the type of file content in
that patch, which should be u64 and will be fixed.
[1] https://lists.nongnu.org/archive/html/qemu-devel/2016-06/msg04389.html
---
Makefile | 2 +-
src/fw/msr_feature_control.c | 16 ++++++++++++++++
src/fw/paravirt.c | 3 +++
src/fw/smp.c | 6 +++++-
src/util.h | 5 +++++
5 files changed, 30 insertions(+), 2 deletions(-)
create mode 100644 src/fw/msr_feature_control.c
diff --git a/Makefile b/Makefile
index 4930b3a..f38a075 100644
--- a/Makefile
+++ b/Makefile
@@ -43,7 +43,7 @@ SRC32FLAT=$(SRCBOTH) post.c e820map.c malloc.c romfile.c x86.c optionroms.c \
fw/paravirt.c fw/shadow.c fw/pciinit.c fw/smm.c fw/smp.c fw/mtrr.c fw/xen.c \
fw/acpi.c fw/mptable.c fw/pirtable.c fw/smbios.c fw/romfile_loader.c \
hw/virtio-ring.c hw/virtio-pci.c hw/virtio-blk.c hw/virtio-scsi.c \
- hw/tpm_drivers.c
+ hw/tpm_drivers.c fw/msr_feature_control.c
SRC32SEG=string.c output.c pcibios.c apm.c stacks.c hw/pci.c hw/serialio.c
DIRS=src src/hw src/fw vgasrc
diff --git a/src/fw/msr_feature_control.c b/src/fw/msr_feature_control.c
new file mode 100644
index 0000000..35d4ab8
--- /dev/null
+++ b/src/fw/msr_feature_control.c
@@ -0,0 +1,16 @@
+#include "util.h" // msr_feature_control_setup
+#include "x86.h" // wrmsr
+#include "romfile.h" // romfile_find
+
+u64 feature_control_bits;
+
+void msr_feature_control_setup(void)
+{
+ struct romfile_s *f = romfile_find("etc/msr_feature_control");
+ if (!f)
+ return;
+
+ f->copy(f, &feature_control_bits, sizeof(feature_control_bits));
+ if (feature_control_bits)
+ wrmsr(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
+}
diff --git a/src/fw/paravirt.c b/src/fw/paravirt.c
index 8ed4380..640ee4c 100644
--- a/src/fw/paravirt.c
+++ b/src/fw/paravirt.c
@@ -153,6 +153,9 @@ qemu_platform_setup(void)
mtrr_setup();
smp_setup();
+ // Initialize MSR_IA32_FEATURE_CONTROL
+ msr_feature_control_setup();
+
// Create bios tables
pirtable_setup();
mptable_setup();
diff --git a/src/fw/smp.c b/src/fw/smp.c
index 579acdb..8b57bf4 100644
--- a/src/fw/smp.c
+++ b/src/fw/smp.c
@@ -10,7 +10,7 @@
#include "output.h" // dprintf
#include "romfile.h" // romfile_loadint
#include "stacks.h" // yield
-#include "util.h" // smp_setup
+#include "util.h" // smp_setup, msr_feature_control_setup
#include "x86.h" // wrmsr
#define APIC_ICR_LOW ((u8*)BUILD_APIC_ADDR + 0x300)
@@ -63,6 +63,10 @@ handle_smp(void)
for (i=0; i<smp_mtrr_count; i++)
wrmsr(smp_mtrr[i].index, smp_mtrr[i].val);
+ // MSR_IA32_FEATURE_CONTROL setup
+ if (feature_control_bits)
+ wrmsr(MSR_IA32_FEATURE_CONTROL, feature_control_bits);
+
// Set bit on FoundAPICIDs
FoundAPICIDs[apic_id/32] |= (1 << (apic_id % 32));
diff --git a/src/util.h b/src/util.h
index 7b41207..fc8e59d 100644
--- a/src/util.h
+++ b/src/util.h
@@ -103,6 +103,11 @@ int csm_bootprio_pci(struct pci_device *pci);
// fw/mptable.c
void mptable_setup(void);
+// fw/msr_feature_control.c
+#define MSR_IA32_FEATURE_CONTROL 0x0000003a
+extern u64 feature_control_bits;
+void msr_feature_control_setup(void);
+
// fw/mtrr.c
void mtrr_setup(void);
--
2.9.0
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