[SeaBIOS] [PATCH v3] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

Laszlo Ersek lersek at redhat.com
Wed Jul 6 09:44:48 CEST 2016

On 07/06/16 08:49, Haozhong Zhang wrote:
> On 07/06/16 08:42, Laszlo Ersek wrote:
>> On 07/06/16 08:28, Haozhong Zhang wrote:
>>> Hi Ashok,
>>> On 07/06/16 02:18, Paolo Bonzini wrote:
>>>>> I forgot to restore MSR_IA32_FEATURE_CONTROL in the resume path, and
>>>>> MSR_IA32_FEATURE_CONTROL is zero after S3 resume.
>>>> This is a bug.  Sorry Laszlo. :)
>>>>> Not restore MSR_IA32_FEATURE_CONTROL during S3 resume does not affect
>>>>> at least Linux guest (tested 4.5). Current QEMU may advise the guest
>>>>> firmware to set bit 20 (for LMCE), bit 2 (for VMX) and bit 0 (lock
>>>>> bit).
>>>>> - For LMCE, Linux only checks bit 20 and bit 0 at boot time and then
>>>>>   keeps using the result even after resume.
>>>> On real hardware, LMCE would not be enabled after resume.  I'm not
>>>> sure what would happen, but it wouldn't be good.
>>> Could you help to check if the LMCE bit in MSR_IA32_FEATURE_CONTROL is
>>> set after S3 resume on the real hardware?
>> The SDM says that IA32_FEATURE_CONTROL is zeroed on logical processor reset.
>>   [...] VMXON is also controlled by the IA32_FEATURE_CONTROL MSR (MSR
>>   address 3AH). This MSR is cleared to zero when a logical processor is
>>   reset. [...]
> Ah, I missed a bit in my question. I meant to check whether the
> firmware on the real machine sets the LMCE bit and other necessary
> bits in MSR_IA32_FEATURE_CONTROL after S3 resume.

I attached a minimal kernel module (reproducer / tester) to the github
issue here:


We can use it for both testing the feature in guests, and for querying
the MSR on physical machines.

Specifically on my ThinkPad W541, the MSR has value 0x5:

[ 2885.877339] MSR 0x3a on CPU 0: 0x5
[ 2908.151693] MSR 0x3a on CPU 1: 0x5

which, according to

#define FEATURE_CONTROL_LOCKED				(1<<0)
#define FEATURE_CONTROL_LMCE				(1<<20)

corresponds to


FEATURE_CONTROL_LMCE is not set at all. (I didn't do any S3 cycles in my
current laptopt boot.)

My CPU is i7-4810MQ. It's a pretty modern laptop, so I think it is
capable of LMCE, hardware-wise (if LMCE is hw-dependent, to begin with).

In order to verify if my laptop was indeed capable of LCME, I read the
IA32_MCG_CAP MSR as well:

# insmod ./rdmsr.ko msr=0x00000179
MSR 0x179 on CPU 0: 0xc09

"MCG_LMCE_P" is bit 27 (value 0x8000000). So, apparently, I was wrong;
my laptop does not support LMCE, and it's not surprising the BIOS
doesn't set the LCME bit in the feature control MSR :)

Anyway I think you should be able to use the kernel module for
experimenting with MSRs on other hosts.


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