[SeaBIOS] [PATCH 2/4] pci: Move code in pci.c that is specific to pciinit.c to pciinit.c

[Kevin O'Connor]

Signed-off-by: Kevin O'Connor <kevin at koconnor.net>
---
 src/fw/mtrr.c    |  1 -
 src/fw/pciinit.c | 37 +++++++++++++++++++++++++++++++++++++
 src/hw/pci.c     | 26 --------------------------
 src/hw/pci.h     | 15 ---------------
 src/util.h       |  2 ++
 5 files changed, 39 insertions(+), 42 deletions(-)

diff --git a/src/fw/mtrr.c b/src/fw/mtrr.c
index 913580e..3e799ce 100644
--- a/src/fw/mtrr.c
+++ b/src/fw/mtrr.c
@@ -5,7 +5,6 @@
 // This file may be distributed under the terms of the GNU LGPLv3 license.
 
 #include "config.h" // CONFIG_*
-#include "hw/pci.h" // pcimem_start
 #include "output.h" // dprintf
 #include "paravirt.h" // RamSize
 #include "util.h" // mtrr_setup
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index 8e6716d..ead2c1a 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -27,6 +27,17 @@
 #define PCI_BRIDGE_MEM_MIN    (1<<21)  // 2M == hugepage size
 #define PCI_BRIDGE_IO_MIN      0x1000  // mandated by pci bridge spec
 
+#define PCI_ROM_SLOT 6
+#define PCI_NUM_REGIONS 7
+#define PCI_BRIDGE_NUM_REGIONS 2
+
+enum pci_region_type {
+    PCI_REGION_TYPE_IO,
+    PCI_REGION_TYPE_MEM,
+    PCI_REGION_TYPE_PREFMEM,
+    PCI_REGION_TYPE_COUNT,
+};
+
 static const char *region_type_name[] = {
     [ PCI_REGION_TYPE_IO ]      = "io",
     [ PCI_REGION_TYPE_MEM ]     = "mem",
@@ -667,6 +678,32 @@ static int pci_bus_hotplug_support(struct pci_bus *bus, u8 pcie_cap)
     return !!shpc_cap;
 }
 
+/* Test whether bridge support forwarding of transactions
+ * of a specific type.
+ * Note: disables bridge's window registers as a side effect.
+ */
+static int pci_bridge_has_region(struct pci_device *pci,
+                                 enum pci_region_type region_type)
+{
+    u8 base;
+
+    switch (region_type) {
+        case PCI_REGION_TYPE_IO:
+            base = PCI_IO_BASE;
+            break;
+        case PCI_REGION_TYPE_PREFMEM:
+            base = PCI_PREF_MEMORY_BASE;
+            break;
+        default:
+            /* Regular memory support is mandatory */
+            return 1;
+    }
+
+    pci_config_writeb(pci->bdf, base, 0xFF);
+
+    return pci_config_readb(pci->bdf, base) != 0;
+}
+
 static int pci_bios_check_devices(struct pci_bus *busses)
 {
     dprintf(1, "PCI: check devices\n");
diff --git a/src/hw/pci.c b/src/hw/pci.c
index 1576787..dcf240c 100644
--- a/src/hw/pci.c
+++ b/src/hw/pci.c
@@ -244,32 +244,6 @@ u8 pci_find_capability(struct pci_device *pci, u8 cap_id, u8 cap)
     return 0;
 }
 
-/* Test whether bridge support forwarding of transactions
- * of a specific type.
- * Note: disables bridge's window registers as a side effect.
- */
-int pci_bridge_has_region(struct pci_device *pci,
-        enum pci_region_type region_type)
-{
-    u8 base;
-
-    switch (region_type) {
-        case PCI_REGION_TYPE_IO:
-            base = PCI_IO_BASE;
-            break;
-        case PCI_REGION_TYPE_PREFMEM:
-            base = PCI_PREF_MEMORY_BASE;
-            break;
-        default:
-            /* Regular memory support is mandatory */
-            return 1;
-    }
-
-    pci_config_writeb(pci->bdf, base, 0xFF);
-
-    return pci_config_readb(pci->bdf, base) != 0;
-}
-
 // Enable PCI bus-mastering (ie, DMA) support on a pci device
 void
 pci_enable_busmaster(struct pci_device *pci)
diff --git a/src/hw/pci.h b/src/hw/pci.h
index 8e39753..61eb1f3 100644
--- a/src/hw/pci.h
+++ b/src/hw/pci.h
@@ -8,17 +8,6 @@
 #define PORT_PCI_REBOOT        0x0cf9
 #define PORT_PCI_DATA          0x0cfc
 
-#define PCI_ROM_SLOT 6
-#define PCI_NUM_REGIONS 7
-#define PCI_BRIDGE_NUM_REGIONS 2
-
-enum pci_region_type {
-    PCI_REGION_TYPE_IO,
-    PCI_REGION_TYPE_MEM,
-    PCI_REGION_TYPE_PREFMEM,
-    PCI_REGION_TYPE_COUNT,
-};
-
 static inline u8 pci_bdf_to_bus(u16 bdf) {
     return bdf >> 8;
 }
@@ -68,8 +57,6 @@ struct pci_device {
     // Local information on device.
     int have_driver;
 };
-extern u64 pcimem_start, pcimem_end;
-extern u64 pcimem64_start, pcimem64_end;
 extern struct hlist_head PCIDevices;
 extern int MaxPCIBus;
 int pci_probe_host(void);
@@ -124,8 +111,6 @@ int pci_init_device(const struct pci_device_id *ids
 struct pci_device *pci_find_init_device(const struct pci_device_id *ids
                                         , void *arg);
 u8 pci_find_capability(struct pci_device *pci, u8 cap_id, u8 cap);
-int pci_bridge_has_region(struct pci_device *pci,
-                          enum pci_region_type region_type);
 void pci_enable_busmaster(struct pci_device *pci);
 u16 pci_enable_iobar(struct pci_device *pci, u32 addr);
 void *pci_enable_membar(struct pci_device *pci, u32 addr);
diff --git a/src/util.h b/src/util.h
index 43f2199..7b41207 100644
--- a/src/util.h
+++ b/src/util.h
@@ -110,6 +110,8 @@ void mtrr_setup(void);
 void multiboot_init(void);
 
 // fw/pciinit.c
+extern u64 pcimem_start, pcimem_end;
+extern u64 pcimem64_start, pcimem64_end;
 extern const u8 pci_irqs[4];
 void pci_setup(void);
 void pci_resume(void);
-- 
2.5.0