[SeaBIOS] [RFC 2/3] Transitions to and from 64 bits

Marc Marí markmb at redhat.com
Mon Sep 21 16:23:54 CET 2015


On Mon, 21 Sep 2015 12:03:29 -0400
"Kevin O'Connor" <kevin at koconnor.net> wrote:

> On Mon, Sep 21, 2015 at 04:38:00PM +0200, Marc Marí wrote:
> > On Mon, 21 Sep 2015 15:57:56 +0200
> > Gerd Hoffmann <kraxel at redhat.com> wrote:
> > > > +/****************************************************************
> > > > + * Page table
> > > > +
> > > > ****************************************************************/
> > > > +void *gen_identity_page_table(u64 max_addr) +{
> > > > +    /* Map directly all the addresses */
> > > > +    u32 pt_entries = (max_addr + 0xFFF) >> 12;
> > > > +    u32 pdt_entries = (pt_entries + 0x1FF) >> 9;
> > > > +    u32 pdpt_entries = (pdt_entries + 0x1FF) >> 9;
> > > > +    u32 pml4_entries = (pdpt_entries + 0x1FF) >> 9;
> > > 
> > > You can use hugepages.  Then you'll need _alot_ less memory for
> > > the pagetables, and the copying probably goes faster too.
> > 
> > True. Tried with 2M. The memory used went down from 8M to 24K more
> > or less, and the time for the copying went down by 4ms (from 15ms to
> > 11ms). The other option is 1GB. I'll test later if it's enabled in
> > QEMU CPUs.
> > 
> > > You might consider mapping the nvdimm below 4G instead of entering
> > > long mode.
> > 
> > The QEMU NVDIMM driver maps it directly above 4G to avoid the
> > trouble of looking for empty spaces in the below 4G section. I
> > didn't want to rework the driver or add more complexity to it.
> > 
> > If you were talking about just enabling paging and map the NVDIMM to
> > below 4G, it would work for just a few gigs above 4G (don't remember
> > exactly the number). So better give it all.
> 
> According to my Intel docs, PAE supports the same 52bit physical
> address range that x86_64 supports.

Ok, maybe I messed up. I'll check again.
 
> Switching to/from PAE looks like it would be notably simpler (it's
> just four 4KB page directories loaded with 2MB pages) and I think it
> may be possible to do the switch entirely in C code.  But it does
> require the pain of "bank switching" to access the high memory.
> 
> > And SeaBIOS may need 64 bit support for other things in the future,
> > so this might be useful later.
> 
> If that's the case, those things will only work on 64bit CPUs, and
> SeaBIOS currently supports machines as old as i386.  (BTW, your patch
> should check the cpuid stuff before jumping to 64bit mode.)

Yes, is one of the things missing, although I forgot to write it in the
cover letter.

> Also, your code seems to run regular 32bit code when in "long mode" -
> is that valid?

It doesn't crash. And I think it's valid. When dissasembling, the 64 bit
operations have the prefix 0x48, the same that happens in a "normal" 64
bit application.

Thanks
Marc



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