[SeaBIOS] [Qemu-devel] [PATCH v4 for-2.3 10/25] hw/acpi: add support for multiple root busses
Michael S. Tsirkin
mst at redhat.com
Sun Mar 8 17:10:41 CET 2015
On Sun, Mar 08, 2015 at 01:16:12PM +0200, Marcel Apfelbaum wrote:
> If the machine has several root busses, we need to add them to
> acpi in order to be properly detected by guests.
>
> Signed-off-by: Marcel Apfelbaum <marcel at redhat.com>
> ---
> hw/i386/acpi-build.c | 32 ++++++++++++++++++++++++++++++++
> 1 file changed, 32 insertions(+)
>
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index b94e47e..e5709e8 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -60,6 +60,8 @@
> #include "qom/qom-qobject.h"
> #include "exec/ram_addr.h"
>
> +#include "qmp-commands.h"
> +
> /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and
> * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows
> * a little bit, there should be plenty of free space since the DSDT
> @@ -682,6 +684,36 @@ build_ssdt(GArray *table_data, GArray *linker,
> /* Reserve space for header */
> acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader));
>
> + {
> + PciInfoList *info_list, *info;
> + Error *err = NULL;
> +
> + info_list = qmp_query_pci(&err);
> + if (err) {
> + error_free(err);
> + return;
> + }
> +
> + for (info = info_list; info; info = info->next) {
> + PciInfo *bus_info = info->value;
> +
> + if (bus_info->bus == 0) {
> + continue;
> + }
> +
> + scope = aml_scope("\\_SB");
> + dev = aml_device("PC%.02X", (uint8_t)bus_info->bus);
> + aml_append(dev, aml_name_decl("_UID",
> + aml_string("PC%.02X", (uint8_t)bus_info->bus)));
> + aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A03")));
> + aml_append(dev,
> + aml_name_decl("_BBN", aml_int((uint8_t)bus_info->bus)));
Hmm not all pci buses have hardware-assigned bus numbers,
a separate segment is also an option.
How about only getting your specific ones?
> + aml_append(scope, dev);
> + aml_append(ssdt, scope);
> + }
> + qapi_free_PciInfoList(info_list);
> + }
> +
> scope = aml_scope("\\_SB.PCI0");
> /* build PCI0._CRS */
> crs = aml_resource_template();
> --
> 2.1.0
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