[SeaBIOS] [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses.

Benjamin Herrenschmidt benh at kernel.crashing.org
Mon Jun 15 04:50:08 CEST 2015

On Sun, 2015-06-14 at 17:59 -0400, Kevin O'Connor wrote:
> There are x86 systems with multiple separate PCI root buses where one
> can access the pci config space of all the buses using the same 0x0cf8
> IO space.  During system setup, the multiple PCI root buses are each
> configured to only respond to PCI config accesses within its range of
> bus numbers.  So if "root1" is configured for bus ids between 64-128,
> then it will only forward the request if the bus id in the request is
> between 64-128.
> I suspect in your PPC example that the separate root buses all had
> separate io/memory space as well and thus were completely separate.
> (That is, they don't share the equivalent of IO 0x0cf8.)  If so,
> that's different from how the x86 qemu code and the x86 systems I was
> discussing above work.

Correct, my point is that qemu shouldn't be made to rely on the stable
bus numbers. Why not use the mmconfig address instead ? That way you can
factor the bus number in via an offset if it's relevant or provide a
completely different address if the busses are separate.


More information about the SeaBIOS mailing list