[SeaBIOS] [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses.

Marcel Apfelbaum marcel at redhat.com
Fri Jun 12 14:17:27 CEST 2015

On 06/12/2015 09:00 AM, Gerd Hoffmann wrote:
>    Hi,
>> On each boot, coreboot might decide to assign a different bus id to
>> the extra roots (for example, if a device with a PCI bridge is
>> inserted and it's bus allocation causes bus ids to shift).
>> Technically, coreboot could even change the order extra buses are
>> assigned bus ids, but doesn't today.
>> This was seen on several AMD systems - I'm told at least some Intel
>> systems have multiple root buses, but the bus numbers are just hard
>> wired.
> This is how the qemu pxb works: root bus numbers are a config option for
> the root bridge device, i.e. from the guest point of view they are
> hard-wired.
Exactly. In our case, the HW assigns the PXB bus bumber, and again, I saw this
also on real HW with multiple buses, the bus nr comes from ACPI, meaning the vendor.

Let's focus on the problem in hand:
We need a way for QEMU to write some fw path on bootorder fw_config file and
both Seabios/OVMF need to know how to correctly map this to the actual device.

If the boot device is behind a PXI extra root bus, there is a need not only to
differentiate the root bus but also to know *which one*. So we need the bus number,
what other way is there? As Gerd mentioned, the PXB bus number is provided in QEMU command line,
meaning hard-wired.

We can of course, as Laszlo suggested, add an extra condition the use of this path:
/pci-root at bus-br/ on running in QEMU in order not to interfere with other HW. Less pretty but
more robust.


> cheers,
>    Gerd

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