[SeaBIOS] [PATCH V3 0/2] fw/pci: better support for multiple host bridges
marcel.apfelbaum at gmail.com
Wed Feb 25 13:04:01 CET 2015
On 02/24/2015 07:34 PM, Kevin O'Connor wrote:
> On Mon, Feb 16, 2015 at 07:29:18PM +0200, Marcel Apfelbaum wrote:
>> The series is developed together with QEMU's:
>> [Qemu-devel] [PATCH RFC 00/17] implement multiple primary busses for pc machines
>> http://lists.gnu.org/archive/html/qemu-ppc/2015-01/msg00159.html (not related to ppc)
>> v2 -> v3:
>> - Addressed Kevin O'Connor comment to drop res_on_default_bus flag.
>> - Added him as signed-off-by, I hope is OK.
>> v1 -> v2:
>> - Addressed Kevin O'Connor idea (Thanks!) to treat devices behind extra root
>> PCI buses as belonging to Bus 0 for resource resizing and mapping.
>> The series fixes some issues when more than one root primary bus is present.
>> First patch scans all the bus range to find the extra root buses.
>> Second patch extends memory and IO mapping for found buses.
> Thanks Marcel.
> The patches look fine to me. I'd prefer to commit after the upstream
> QEMU changes are in.
Thank you for accepting them.
The problem here is the QEMU series depends on it,while this series
doesn't depend on QEMU.
If no extra roots are present, the functionality is preserved as it is today.
I was waiting with the QEMU series to see the depending code getting accepted,
the depending code being this SEABIOS series and ACPI dynamic one that already
has a PULL request for it.
My main concern is the possibility for reviewers/testers to try it without too much work,
but I guess it doesn't really matter.
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