[SeaBIOS] [PATCH] pci: enable SERR# for error forwording in bridge control register

Kevin O'Connor kevin at koconnor.net
Tue Feb 24 17:59:47 CET 2015

On Wed, Jan 28, 2015 at 04:05:13PM +0800, Chen Fan wrote:
> For PCIe device support AER(Advanced Error Reporting), from the
> pcie spec 3.0 chapter 6.2.5, ERR_COR, ERR_NONFATAL, and ERR_FATAL
> can be forwarded from the secondary interface to the primary interface,
> only require the SERR# Enable bit in the Bridge Control register is set.
> and at the kernel side, we found only _HPP() method can enable
> SERR#, So here we want to turn on this bit.

I fixed the spelling of "forwarding" and applied this patch.


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